Concurrent true and complement signal generation
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsManish Trivedi, Manish Umedlal Patel
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AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsManish Trivedi, Manish Umedlal Patel
Estimating the term…
A circuit generates low-skew true and complement output signals from an input signal using an inverter, true signal generation circuitry, and complement signal generation circuitry. The inverter operates between a high-voltage reference source (VDD) and a low-voltage reference source (VSS) and inverts the input signal to generate a delayed complement input signal. The true signal generation circuitry, which comprises a p-type transistor in series with an n-type transistor, (i) operates between (a) one of VDD and VSS and (b) one of the true input signal and the complement input signal and (ii) generates a true output signal. The complement signal generation circuitry, which also comprises p-type transistor in series with an n-type transistor, (i) operates between (a) one of VDD and VSS and (b) one of the true input signal and the complement input signal and (ii) generates a complement output signal.
An apparatus comprising a true and complement signal generation circuit comprising:
A method for generating true and complement output signals, the method comprising:
An apparatus comprising a true and complement signal generation circuit comprising:
Dependencies are inferred from the claim text.