PIN diode circuit and PIN diode attenuator

A PIN diode attenuator comprising:

• a RF input port;
• a RF output port;
• a quadrature hybrid with a first port being connected to the RF input port and a second port being connected to the RF output port, the quadrature hybrids third port being connected to a first PIN diode circuit and a fourth port being connected to a second PIN diode circuit, wherein the first and second PIN diode circuit each comprising:
• a RF input coupled to a first junction point via a first DC blocking circuit;
• a constant voltage source coupled to the first junction point via a first DC feeding circuit, wherein the constant voltage source is configured to DC bias the first junction point;
• a first PIN diode with an anode thereof coupled to the first junction point and a cathode thereof coupled to an anode of a second PIN diode via a second DC blocking circuit, wherein the cathode of the second PIN diode is configured to be coupled to ground potential;
• an adjustable voltage source coupled to a second junction point via a second DC feeding circuit, wherein the second junction point is coupled to the cathode of the first PIN diode via a first resistor, the second junction point is further coupled to the anode of the second PIN diode via a second resistor;
• whereby the RF resistance between the RF input port and the RF output port is controlled by the adjustable voltage source of the first and the second PIN diode attenuators coupled to the two output ports of the quadrature hybrid.