Power conversion apparatus and power conversion method with phase control

A power conversion apparatus comprising:

• a primary side circuit having a primary side first arm circuit and a primary side second arm circuit;
• a secondary side circuit magnetically coupled to the primary side circuit via a transformer, the secondary side circuit having a secondary side first arm circuit and a secondary side second arm circuit,
• wherein power conversion efficiency between the primary side circuit and the secondary side circuit is reduced to a smaller value as a phase difference between switching of the primary side circuit and switching of the secondary side circuit is smaller;
• and
• a control unit configured to increase the phase difference by increasing a frequency of the switching of each of the primary side circuit and the secondary side circuit,
• wherein the phase difference is a time lag between the switching timings of the primary side first arm circuit and the secondary side first arm circuit, and a time lag between the switching timings of the primary side second arm circuit and the secondary side second arm circuit,
• wherein the time lag between the switching timing of the primary side first arm circuit and the secondary side first arm circuit and the time lag between the switching timing of the primary side second arm circuit and the secondary side second arm circuit are controlled to be equal to each other.

A power conversion method comprising:

• increasing a frequency of switching of each of a primary side circuit and a secondary side circuit magnetically coupled to the primary side circuit via a transformer, and a phase difference between the switching of the primary side circuit and the switching of the secondary side circuit in accordance with power conversion efficiency between the primary side circuit and the secondary side circuit,
• wherein the primary side circuit includes a primary side first arm circuit and a primary side second arm circuit and the secondary side circuit includes a secondary side first arm circuit and a secondary side second arm circuit,
• wherein the phase difference is a time lag between the switching timings of the primary side first arm circuit and the secondary side first arm circuit, and a time lag between the switching timings of the primary side second arm circuit and the secondary side second arm circuit,
• wherein the time lag between the switching timing of the primary side first arm circuit and the secondary side first arm circuit and the time lag between the switching timing of the primary side second arm circuit and the secondary side second arm circuit are controlled to be equal to each other.