US 9,437,749 B2Granted

Semiconductor device and method for fabricating the same

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorShunpei Yamazaki

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Abstract

To provide a highly reliable semiconductor device exhibiting stable electrical characteristics. To fabricate a highly reliable semiconductor device. Included are an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked, a source and a drain electrode layers contacting the oxide semiconductor stack, a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating layer provided therebetween, and a first and a second oxide insulating layers between which the oxide semiconductor stack is sandwiched. The first to the third oxide semiconductor layers each contain indium, gallium, and zinc. The proportion of indium in the second oxide semiconductor layer is higher than that in each of the first and the third oxide semiconductor layers. The first oxide semiconductor layer is amorphous. The second and the third oxide semiconductor layers each have a crystalline structure.

Claims18

Dependent claims

A semiconductor device comprising:

a transistor including a channel formation region, the channel formation region comprising silicon,
a first insulating layer over the transistor,;
a first gate electrode over the first insulating layer;
a second insulating layer over the first gate electrode;
a first oxide semiconductor layer over the second insulating layer, the first oxide semiconductor layer overlapping with the first gate electrode;
a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer overlapping with the first gate electrode;
a third oxide semiconductor layer over the second oxide semiconductor layer, the third oxide semiconductor layer overlapping with the first gate electrode;
a source electrode and a drain electrode over the first oxide semiconductor layer and the second oxide semiconductor layer, the source electrode and the drain electrode electrically connected to the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer;
a third insulating layer over the third oxide semiconductor layer, the source electrode, and the drain electrode;
and
a second gate electrode over the third insulating layer, the second gate electrode overlapping with the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer,
wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises at least one of indium, zinc, and gallium,
wherein the third oxide semiconductor layer and a side surface of the second oxide semiconductor layer are in contact with each other, and
wherein the third oxide semiconductor layer and a side surface of the first oxide semiconductor layer are in contact with each other.

11 more elements

A semiconductor device comprising:

a transistor including a channel formation region, the channel formation region comprising silicon,
a first insulating layer over the transistor;
a first gate electrode over the first insulating layer;
a second insulating layer over the first gate electrode;
a first oxide semiconductor layer over the second insulating layer, the first oxide semiconductor layer overlapping with the first gate electrode;
a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer overlapping with the first gate electrode;
a third oxide semiconductor layer over the second oxide semiconductor layer, the third oxide semiconductor layer overlapping with the first gate electrode;
a source electrode and a drain electrode over the first oxide semiconductor layer and the second oxide semiconductor layer, the source electrode and the drain electrode electrically connected to the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer;
a third insulating layer over the third oxide semiconductor layer, the source electrode, and the drain electrode;
and
a second gate electrode over the third insulating layer, the second gate electrode overlapping with the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer,
wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises at least one of indium, zinc, and gallium,
wherein the third oxide semiconductor layer and a side surface of the second oxide semiconductor layer are in contact with each other,
wherein the third oxide semiconductor layer and a side surface of the first oxide semiconductor layer are in contact with each other, and
wherein one of the source electrode and the drain electrode is electrically connected to the transistor.

12 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/995,247Filed 14 Jan 2016 · continuation
Priority: JP 2012-17863410 Aug 2012
Published: US 2016/0133756 A112 May 2016
Granted: 6 Sep 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 30/6756
Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate: amorphous oxide semiconductors
H10D 30/6729
Thin-film transistors [TFT]: characterised by the electrodes
H10D 30/6739
Characterised by the electrode materials: conductor-insulator-semiconductor electrodes
H10D 30/6755
Characterised by the active materials: oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate

Family

Application13/959,854Parent of this continuation · filed 6 Aug 2013
US 2016/0133756 A1Pre-grant publication · published 12 May 2016
US 9,240,492 B2Parent of this continuation
US 2014/0042433 A1Published application
US 9,437,749 B2This patent

From the US filing history. Foreign family members aren’t listed.

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