Tunnel FET
AssigneeKabushiki Kaisha Toshiba
InventorsAkira Hokazono, Yoshiyuki Kondo
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Abstract
According to one embodiment, a tunnel FET includes a semiconductor region of a first conductivity type, a gate electrode provided on a surface portion of the semiconductor region via a gate insulating film, a source region provided in the semiconductor region on one side of the gate electrode, and a drain region provided in the semiconductor region on the other side of the gate electrode. The source region is a region of either the first conductivity type or a second conductivity type having a higher impurity concentration than the semiconductor region of the first conductivity type. The drain region includes a Schottky barrier junction.
Claims5
A tunnel FET comprising:
- a semiconductor region of a first conductivity type;
- a gate electrode provided on a surface portion of the semiconductor region via a gate insulating film;
- a source region provided in the semiconductor region on one side of the gate electrode, the source region being a region of the first Conductivity type having a higher impurity concentration than the semiconductor region;
- and
- a drain region provided in the semiconductor region on the other side of the gate electrode, the drain region comprising a metal silicide, wherein
- an impurity concentration of a portion under the metal silicide is substantially the same as an impurity concentration of a channel under the gate electrode.
Dependencies are inferred from the claim text.