Semiconductor devices with ball strength improvement

A semiconductor device, comprising:

• a contact region over a substrate, wherein the contact region is electrically coupled to an integrated circuit in or on the substrate;
• a metal pad over the contact region, wherein the metal pad is in contact with the contact region;
• a post passivation interconnect (PPI) line over the metal pad;
• a polymer layer over the PPI line, wherein the polymer layer includes an opening aligned over a portion of the PPI line;
• an under-bump-metallurgy (UBM) layer which includes a first UBM region disposed in the opening over the portion of the PPI line and a second UBM region disposed on the polymer layer and spaced apart from the first UBM region;
• a plurality of bumps over the UBM layer, the plurality of bumps being arranged at some, but not all, intersections of a number of columns and rows of a bump pattern wherein, at least in corner regions of the bump pattern, each bump among the plurality of bumps has at least two directly neighboring bumps in neighboring rows or columns;
• a connection bump over the first UBM region, wherein the connection bump is electrically coupled to the contact region through the first UBM region, the PPI line, and the metal pad;
• and
• a dummy bump over the second UBM region and electrically isolated from the integrated circuit.

A semiconductor device with improved bump strength, said semiconductor device comprising:

• a chip having an active surface;
• a plurality of connection bumps on the active surface and in electrical connection with the chip, said connection bumps being arranged at some, but not all, intersections of a number of columns and rows of a bump pattern;
• and
• a plurality of dummy bumps on the active surface but not in electrical connection with the chip, said dummy bumps being arranged at intersections where the connection bumps are not arranged and leaving some intersections without connection bumps and without dummy bumps;
• wherein, at least in corner regions of the chip, every connection bump of the plurality of connection bumps and dummy bump of the plurality of dummy bumps has at least two neighboring bumps in at least two directly neighboring intersections, respectively, the at least two neighboring bumps being connection bumps, dummy bumps, or a combination of connection bumps and dummy bumps.