Through silicon vias

A device comprising:

• a substrate with top and bottom surfaces;
• a through silicon via (TSV) in the substrate, the TSV extends through top and bottom surfaces of the substrate;
• an insulation stack disposed in the TSV, the insulation stack lines the sidewalls of the TSV and comprises a first insulation layer, a polish stop layer and a second insulation layer, wherein the polish stop layer lines the first insulation layer and the second insulation layer lines the polish stop layer in the TSV, the first insulation layer and the polish stop layer further extends over the top surface of the substrate and continuously line the top surface, wherein the polish stop layer is disposed over the first insulation layer;
• and
• a conductive plug disposed in the TSV and fills the TSV having the insulation stack lining the sidewall, wherein a top surface of the conductive plug in the TSV is coplanar with a top surface of the polish stop layer over the top surface of the substrate, the polish stop layer serves as a polish stop for a planarizing process.