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US 9,437,545 B2Granted
Interconnects having sealing structures to enable selective metal capping layers
AssigneeIntel Corporation
InventorsJun He, Kevin J. Fischer, Ying Zhou, Peter K. Moon
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Abstract
Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.
Claims6
A method of fabricating an interconnect structure, comprising:
- providing an interconnect including a conductive material extending into a dielectric material layer;
- forming capping layer proximate said interconnect;
- forming a sealing structure to seal at least one gap of exposed interconnect conductive material between said capping layer and said dielectric layer;
- and
- exposing the exposed interconnect conductive material to silane to form a first salicide layer;
- and
- exposing the first salicide layer to an ammonia source to form a silicon nitride layer.
4 more elements
A method of fabricating an interconnect structure, comprising:
- providing a dielectric material layer;
- forming an opening within said dielectric material layer;
- forming a barrier material layer on at least one sidewall and bottom of said opening;
- disposing a conductive material within said opening and abutting said barrier material layer;
- forming capping layer proximate said conductive material;
- forming a sealing structure to seal at least one gap of exposed conductive material between said capping layer and said dielectric layer, wherein forming said sealing structure comprises forming a salicide in portions of a conductive material of said interconnect by exposure to silane and exposing said salicide to an ammonia source to form a silicon nitride layer.
3 more elements
Dependencies are inferred from the claim text.