Method for the formation of different gate metal regions of MOS transistors
AssigneeSTMicroelectronics (Crolles 2) SAS
InventorsStéphane Zoll, Philippe Garnier, Olivier Gourhant, Vincent Joseph
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AssigneeSTMicroelectronics (Crolles 2) SAS
InventorsStéphane Zoll, Philippe Garnier, Olivier Gourhant, Vincent Joseph
Estimating the term…
A method is for forming at least two different gates metal regions of at least two MOS transistors. The method may include forming a metal layer on a gate dielectric layer; and forming a metal hard mask on the metal layer, with the hard mask having a composition different from that of the metal layer and covering a first region of the metal layer and leaving open a second region of the metal layer. The method may also include diffusion annealing the intermediate structure obtained in the prior steps such as to make the metal atoms of the hard mask diffuse into the first region, and removal of the hard mask.
A method for forming at least two different gate metal regions of at least two MOS transistors comprising:
A method for making an integrated circuit including at least two different gate metal regions of at least two MOS transistors, the method comprising:
A method for making an integrated circuit including at least two different gate metal regions of at least two MOS transistors, the method comprising:
Dependencies are inferred from the claim text.