Uniform, damage free nitride etch

A method of forming an integrated circuit, comprising the steps:

• forming a conformal layer of silicon nitride over a first transistor of said integrated circuit;
• anisotropically etching said conformal layer of silicon nitride to leave sidewall spacers on lateral surfaces of a gate of said first transistor;
• forming a surface layer of oxidized silicon on exposed surfaces of said sidewall spacers;
• placing said integrated circuit in a two-step oxidized layer etch tool, so that a substrate of said integrated circuit is on a substrate base of said two-step oxidized layer etch tool, said substrate base being at a temperature of 25° C. to 35° C.;
• generating a plasma in said two-step oxidized layer etch tool using a fluorine-containing gas, ammonia and an inert gas so as to produce fluorine radicals which adsorb onto said surface layer of oxidized silicon and react with said surface layer of oxidized silicon while said substrate is on said substrate base;
• raising said substrate off said substrate base proximate to a heated showerhead of said two-step oxidized layer etch tool so that by-products of a reaction between said fluorine radicals and said surface layer of oxidized silicon are removed, said heated element being at a temperature of 110° C. to 120° C.;
• subsequently lowering said substrate onto said substrate base;
• generating a plasma in said two-step oxidized layer etch tool using fluorine-containing reagents which are substantially free of ammonia so as to produce fluorine radicals which react with silicon in said sidewall spacers so as to remove at least a portion of said sidewall spacers, so that said integrated circuit is not exposed to an ambient containing more than 1 torr of oxygen between said step of raising said substrate off said substrate base and the instant step;
• and
• subsequently forming a permanent stress layer over said first transistor.

A method of forming an integrated circuit, comprising the steps:

• forming a conformal layer of silicon nitride over a plurality of gates of said integrated circuit, said gates being adjacent to one another;
• anisotropically etching said conformal layer of silicon nitride to leave sidewall spacers on lateral surfaces of said gates;
• forming a surface layer of oxidized silicon on exposed surfaces of said sidewall spacers;
• placing said integrated circuit in a two-step oxidized layer etch tool, so that a substrate of said integrated circuit is on a substrate base of said two-step oxidized layer etch tool, said substrate base being at a temperature of 25° C. to 35° C.;
• generating a plasma in said two-step oxidized layer etch tool using a fluorine-containing gas, ammonia and an inert gas so as to produce fluorine radicals which adsorb onto said surface layer of oxidized silicon and react with said surface layer of oxidized silicon while said substrate is on said substrate base;
• raising said substrate off said substrate base proximate to a heated showerhead of said two-step oxidized layer etch tool so that by-products of a reaction between said fluorine radicals and said surface layer of oxidized silicon are removed, said heated element being at a temperature of 110° C. to 120° C.;
• subsequently lowering said substrate onto said substrate base;
• generating a plasma in said two-step oxidized layer etch tool using fluorine-containing reagents which are substantially free of ammonia so as to produce fluorine radicals which react with silicon in said sidewall spacers so as to remove a portion of said sidewall spacers, so that said integrated circuit is not exposed to an ambient containing more than 1 torr of oxygen between said step of raising said substrate off said substrate base and the instant step;
• and
• subsequently forming a PMD layer over said plurality of said gates.