Semiconductor device and fabrication method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Hsi Yeh, Tsung-Chieh Tsai, Chun-Yi Lee
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes an inter-layer dielectric (ILD) layer over a substrate; and a first gate feature in the ILD layer, the first gate feature comprising a first gate material and having a first resistance, wherein the first gate material comprises a first conductive material. The semiconductor device further includes a second gate feature in the ILD layer, the second gate feature comprising a second gate material and having a second resistance higher than the first resistance, wherein the second material comprises at least 50% by volume silicon oxide.
Claims20
A semiconductor device comprising:
- an inter-layer dielectric (ILD) layer over a substrate;
- a first gate stack in the ILD layer, the first gate stack comprising a first gate material and having a first resistance, wherein the first gate material comprises a first conductive material;
- a second gate stack in the ILD layer and separate from the first gate stack, the second gate stack comprising a second gate material and having a second resistance higher than the first resistance, wherein the second material comprises at least 50% by volume silicon oxide, and the first gate stack is substantially free of the second gate material.
A semiconductor device comprising:
- a first gate electrode over a substrate, the first gate electrode comprising a conductive material;
- a dummy gate electrode over the substrate, wherein the dummy gate electrode is on an isolation feature in the substrate, a top surface of the dummy gate electrode is substantially planar with a top surface of the first gate electrode, and the dummy gate electrode has a higher resistance than the first gate electrode, and the dummy gate electrode comprises:
- a first portion comprising polysilicon;
- and
- a second portion comprising silicon oxide wherein the second portion is at least 50% by volume of the dummy gate electrode;
- and
- an inter-layer dielectric (ILD) layer between the first gate electrode and the dummy gate electrode.
A semiconductor device comprising:
- a first gate electrode over a substrate, the first gate electrode comprising a first conductive material;
- a second gate electrode over the substrate, the second gate electrode comprising a second conductive material, wherein a top surface of the second gate electrode is substantially planar with a top surface of the first gate electrode;
- a dummy gate electrode over the substrate, the dummy gate electrode between the first gate electrode and the second gate electrode, wherein the dummy gate electrode is on an isolation feature in the substrate, and the dummy gate electrode has a higher resistance than the first gate electrode, wherein the dummy gate electrode comprises at least 50% by volume silicon oxide;
- and
- an inter-layer dielectric (ILD) layer between the first gate electrode and the dummy gate electrode, wherein the ILD layer is between the dummy gate electrode and the second gate electrode.
Dependencies are inferred from the claim text.