Method for forming spacers for a transistor gate

A method for forming spacers of a gate of a field effect transistor, the gate being situated above an active layer made from semiconductor material surmounting an insulating layer and a supporting substrate, the active layer, the insulating layer and the supporting substrate defining a stack of the silicon on insulator (SOI) type, comprising a step of forming a protective layer covering at least the gate of the transistor, the method comprising:

• before the step of forming the protective layer, a step of forming a porous layer between the gate and the protective layer, the porous layer having a dielectric constant k equal to or less than that of silicon oxide (SiO2);
• after the step of forming the protective layer, a step of etching the protective layer performed anisotropically so as to preserve residual portions of the protective layer solely at the flanks of the gate, these residual portions constituting protective spacers of the gate so as to uncover the porous layer outside the flanks of the gate;
• a modification to the porous layer performed by ion penetration within the porous layer in order to form a modified layer, said modification of the porous layer being performed by means of a plasma, the ions of which penetrate the uncovered porous layer, said modification being carried out anisotropically and so as to modify the porous layer over its entire thickness above the gate and above the active layer and so as not to modify the entire thickness of the porous layer situated on the flanks of the gate, the porous layer situated on the flanks of the gate being protected by the protective spacers and constituting porous spacers for the gate;
• and
• at least one step of removing the modified layer by means of a selective etching of the modified layer vis-à-vis said semiconductor material of the active layer and the protective spacers protecting the porous layer situated on the flanks of the gate.