Apparatus and method for applying at-speed functional test with lower-speed tester
AssigneeSilicon Motion, Inc.
InventorTsung-Chieh Yang
Life of this patent
Estimating the term…
Abstract
A device under test has a connection interface, a controller, and a functional block. The connection interface is used to receive a test pattern transmitted at a first clock rate and output a functional test result. The controller is used to sample the test pattern by using a second clock rate and accordingly generate a sampled test pattern, wherein the second clock rate is higher than the first clock rate. The functional block is used to perform a designated function upon the sampled test pattern and accordingly generate the functional test result.
Claims10
A method for testing a device under test, comprising:
- generating at least one test pattern;
- feeding the at least one test pattern transmitted at a first clock rate into the device under test;
- sampling the at least one test pattern by using a second clock rate and accordingly generate at least one sampled test pattern, wherein the second clock rate is higher than the first clock rate;
- performing a designated function upon the at least one sampled test pattern and accordingly generating at least one functional test result;
- outputting the at least one functional test result;
- wherein the sampling step comprises:
- sampling the at least one test pattern by using the second clock rate to generate a plurality of duplicated test patterns served as the at least one sampled test pattern.
A method for testing a device under test, comprising:
- generating at least one test pattern;
- feeding the at least one test pattern transmitted at a first clock rate into the device under test;
- sampling the at least one test pattern by using a second clock rate and accordingly generate at least one sampled test pattern, wherein the second clock rate is higher than the first clock rate;
- performing a designated function upon the at least one sampled test pattern and accordingly generating at least one functional test result;
- outputting the at least one functional test result;
- wherein the step of generating the at least one test pattern comprises:
- generating the at least one test pattern to intentionally introduce error bits;
- and
- the sampling step comprises:
- sampling the at least one test pattern by using the second clock rate to generate a plurality of duplicated test patterns served as the at least one sampled test pattern;
- and
- the step of performing the designated function comprises:
- utilizing an error checking and correction (ECC) circuit to perform the designated function.
Dependencies are inferred from the claim text.