Circuit and method for reducing write disturb in a non-volatile memory device

A one-time programmable (OTP) memory comprising:

• OTP memory cells connected to bitlines and wordlines;
• a precharge circuit configured to maintain selected and non-selected bitlines at a precharge voltage before executing a bitline access operation and configured to end maintaining the selected and non-selected bitlines at the precharge voltage after commencement of the bitline access operation;
• and,
• access circuitry configured to execute the bitline access operation to access the memory cell connected to a selected bitline initially precharged to the precharge voltage.

A memory precharge circuit, comprising:

• an active precharge current source connected in series between a bitline connected to a memory cell and a precharge voltage,
• configured to provide high current to the bitline in response to a first bias voltage, and
• configured to provide low current to the bitline in response to a second bias voltage,
• the active precharge current source providing at least one of the high current and the low current during a bitline access operation.