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US 9,437,308 B2Granted
Nonvolatile semiconductor memory device which performs improved erase operation
AssigneeKabushiki Kaisha Toshiba
InventorsJun Nakai, Noboru Shibata
Life of this patent
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Abstract
According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory cells arranged in a matrix. The control unit erases data of the memory cells. The control unit interrupts the erase operation of the memory cells and holds an erase condition before the interrupt in accordance with a first command during the erase operation, and resumes the erase operation based on the held erase condition in accordance with a second command.
Claims10
A nonvolatile semiconductor memory device comprising:
- a memory cell array including a plurality of blocks, one of the blocks including a plurality of memory cells;
- and
- a controller configured to perform an erase operation including a first operation and a second operation,
- the first operation including supplying a first erase voltage to the selected block,
- the controller configured to interrupt the erase operation when the controller receives a first command for interrupting the erase operation, the controller configured to perform the second operation when the controller receives a second command for resuming the erase operation, the second operation including supplying a second erase voltage to the selected block, the second erase voltage being higher than the first erase voltage.
2 more elements
Dependencies are inferred from the claim text.