Electronic device

An electronic device comprising a semiconductor memory unit which comprises:

• a first global line;
• a second global line;
• a plurality of cell arrays each including a plurality of storage cells including a selecting element, a variable resistance element of which resistance changes based on a current flowing across the variable resistance element, a first line coupled to one ends of the plurality of storage cells, and a second line coupled to the other ends of the plurality of storage cells;
• a plurality of word lines, each coupled to a selecting element of a corresponding storage cell;
• a plurality of first transistors connected to the first global line and the respective cell arrays;
• a plurality of second transistors connected to the second global line and the respective cell arrays;
• a voltage adjuster configured to adjust the voltage levels of back bias voltages applied to the selecting elements, the plurality of first transistors, and the plurality of second transistors in accordance with a temperature change;
• an access control unit configured to provide a write current or a read current to a selected storage cell among the plurality of storage cells, and
• a word line control unit configured to adjust an activation voltage level applied to the selected word line in accordance with a temperature change,
• wherein, when a decrease in resistance of the variable resistance element according to an increase of temperature is smaller than a sum of an increase in resistance of the selecting element according to the increase of temperature, an increase in resistance of the first transistors according to the increase of temperature, an increase in resistance of the second transistors according to the increase of temperature, an increase in resistance of the first line according to the increase of temperature, an increase in resistance of the second line according to the increase of temperature, an increase in resistance of the first global line according to the increase of temperature, and an increase in resistance of the second global line according to the increase of temperature, the write current and the read current decrease with the increase of temperature,
• wherein the voltage adjuster increases the back bias voltage level with a decrease of temperature, and
• wherein the word line control unit increases the activation voltage level with the decrease of temperature.

An electronic device comprising a semiconductor memory unit which comprises:

• a first global line;
• a second global line;
• a plurality of cell arrays each including a plurality of storage cells including a selecting element, a variable resistance element of which resistance changes based on a current flowing across the variable resistance element, a first line coupled to one ends of the plurality of storage cells, and a second line coupled to the other ends of the plurality of storage cells;
• a plurality of word lines, each coupled to a selecting element of a corresponding storage cell;
• a plurality of first transistors connected to the first global line and the respective cell arrays;
• a plurality of second transistors connected to the second global line and the respective cell arrays;
• a voltage adjuster configured to adjust the voltage levels of back bias voltages applied to the selecting elements, the plurality of first transistors, and the plurality of second transistors in accordance with a temperature change;
• an access control unit configured to provide a write current or a read current to a selected storage cell among the plurality of storage cells, and
• a word line control unit configured to adjust an activation voltage level applied to the selected word line in accordance with a temperature change, when a decrease in resistance of the variable resistance element according to an increase of temperature is equal to a sum of the increase in resistance of the selecting element according to the increase of temperature, an increase in resistance of the first transistors according to the increase of temperature, an increase in resistance of the second transistors according to the increase of temperature, an increase in resistance of the first line according to the increase of temperature, an increase in resistance of the second line according to the increase of temperature, an increase in resistance of the first global line according to the increase of temperature, and an increase in resistance of the second global line according to the increase of temperature, the write current and the read current are maintained at set values,
• wherein the voltage adjuster increases the back bias voltage level with a decrease of temperature,
• wherein the word line control unit increases the activation voltage level with the decrease of temperature.

An electronic device comprising a semiconductor memory unit which comprises:

• a plurality of storage cells each comprising a variable resistance element of which resistance value changes with a current flowing across the variable resistance element and a selecting element coupled to one end of the variable resistance element;
• a plurality of word lines, each coupled to a selecting element of a corresponding storage cell of the plurality of storage cells;
• a first line coupled to one ends of the plurality of storage cells;
• a second line coupled to the other ends of the plurality of storage cells;
• a voltage adjuster configured to adjust the voltage levels of back bias voltages of the selecting elements of the plurality of storage cells in accordance with a temperature change;
• an access control unit electrically coupled to the first and second lines and providing a write current or a read current to a selected storage cell among the plurality of storage cells;
• and
• a word line control unit configured to adjust an activation voltage level applied to the selected word line in accordance with a temperature change, and
• wherein, when a decrease in resistance of the variable resistance element according to an increase of temperature is smaller than a sum of an increase in resistance of the selecting element according to the increase of temperature, an increase in resistance of the first transistors according to the increase of temperature, an increase in resistance of the second transistors according to the increase of temperature, an increase in resistance of the first line according to the increase of temperature, an increase in resistance of the second line according to the increase of temperature, an increase in resistance of the first global line according to the increase of temperature, and an increase in resistance of the second global line according to the increase of temperature, the write current and the read current decrease with the increase of temperature.