Back to results
US 9,437,273 B2Granted
Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Jun Koyama
Life of this patent
Estimating the term…
Abstract
To provide a semiconductor device that has a novel structure and achieves a higher degree of convenience, the semiconductor device is configured to include a memory cell that stores binary data or multilevel data, and a reading circuit that reads the data stored in the memory cell and transfers the data to the outside. The reading circuit includes a first reading circuit for reading binary data and a second reading circuit for reading multilevel data.
Claims16
A semiconductor device comprising:
- a switch;
- a bit line electrically connected to a first terminal of the switch;
- a word line;
- a memory cell electrically connected to the bit line and the word line;
- a first comparator electrically connected to a second terminal of the switch;
- a second comparator electrically connected to a third terminal of the switch;
- and
- a third comparator electrically connected to the third terminal of the switch,
- wherein the memory cell is configured to store binary data or multilevel data,
- wherein the binary data is supplied from the bit line to the first comparator through the switch when the binary data is read from the memory cell,
- wherein the multilevel data is supplied from the bit line to the second comparator through the switch when the multilevel data is read from the memory cell,
- wherein the multilevel data is supplied from the bit line to the third comparator through the switch when the multilevel data is read from the memory cell,
- wherein the first comparator is configured to compare a level of a first reference voltage and a voltage corresponding to the binary data read from the memory cell,
- wherein the second comparator is configured to compare a level of a second reference voltage and a voltage corresponding to the multilevel data read from the memory cell, and
- wherein the third comparator is configured to compare a level of a third reference voltage and the voltage corresponding to the multilevel data read from the memory cell.
12 more elements
A semiconductor device comprising:
- a switch;
- a bit line electrically connected to a first terminal of the switch;
- a word line;
- a memory cell electrically connected to the bit line and the word line;
- a first comparator electrically connected to a second terminal of the switch;
- a second comparator electrically connected to a third terminal of the switch;
- a third comparator electrically connected to the third terminal of the switch;
- and
- a writing circuit electrically connected to the bit line,
- wherein the memory cell is configured to store binary data or multilevel data,
- wherein the binary data is supplied from the bit line to the first comparator through the switch when the binary data is read from the memory cell,
- wherein the multilevel data is supplied from the bit line to the second comparator through the switch when the multilevel data is read from the memory cell,
- wherein the multilevel data is supplied from the bit line to the third comparator through the switch when the multilevel data is read from the memory cell,
- wherein the first comparator is configured to compare a level of a first reference voltage and a voltage corresponding to the binary data read from the memory cell,
- wherein the second comparator is configured to compare a level of a second reference voltage and a voltage corresponding to the multilevel data read from the memory cell,
- wherein the third comparator is configured to compare a level of a third reference voltage and the voltage corresponding to the multilevel data read from the memory cell,
- wherein the writing circuit is configured to output one of a first voltage and a second voltage to the memory cell through the bit line in accordance with the binary data, and
- wherein the writing circuit is configured to output one of a third voltage, a fourth voltage, and a fifth voltage to the memory cell through the bit line in accordance with the multilevel data.
15 more elements
A semiconductor device comprising:
- a bit line;
- a word line;
- a memory cell electrically connected to the bit line and the word line;
- a first switch electrically connected to the bit line;
- a second switch;
- a first comparator electrically connected to a first terminal of the first switch and a first terminal of the second switch;
- a second comparator electrically connected to a second terminal of the first switch and a second terminal of the second switch;
- a third comparator electrically connected to the second terminal of the first switch and the second terminal of the second switch;
- a writing circuit electrically connected to the bit line;
- and
- a voltage generator circuit electrically connected to the second switch.
8 more elements
Dependencies are inferred from the claim text.