Semiconductor device having shallow trench isolation and gate groove

A semiconductor device comprising:

• a semiconductor substrate including first and second regions that have different conductivity types from each other;
• an isolation region over the first and second regions and having a shallow trench covered by a field insulator;
• first and second active regions placed in respective first and second regions and being each surrounded by the isolation region;
• a gate electrode disposed in a lower portion of a gate groove that extends continuously from the first active region to the second active region via the isolation region, the gate groove being shallower than the shallow trench, the isolation region extending continuously over an intermediate region between the first and second active regions and extending continuously underneath the gate electrode in a region where the intermediate region and the gate electrode overlap;
• a cap insulating film disposed in an upper portion of the gate groove so as to cover an upper surface of the gate electrode;
• first and second transistors placed in respective first and second active regions and sharing the gate electrode;
• and
• a logic circuit including the first and second transistors connected in series.

A semiconductor device comprising:

• a semiconductor substrate including first and second regions having first and second conductivity types, respectively;
• a shallow trench isolation (STI) region, a trench of the STI extending in each of the first and second regions and being filled with an insolating material;
• first and second active regions placed in respective first and second regions and each surrounded by the isolation material within the STI region;
• a gate electrode buried in a lower portion of a gate groove that extends continuously from the first active region to the second active region via the isolation region, the gate electrode being over the isolation material of the STI in regions where the gate groove and STI overlap;
• and
• a cap insulating film buried in an upper portion of the gate groove and covering an upper surface of the gate electrode.

A semiconductor device comprising:

• a semiconductor substrate including first and second regions having first and second conductivity types, respectively;
• an isolation region extending in each of the first and second regions;
• first and second active regions placed in respective first and second regions and each surrounded by the isolation region;
• a gate electrode buried in a lower portion of a gate groove that extends continuously from the first active region to the second active region via the isolation region the gate electrode having a circular part formed in a circular shape on the first active region a portion of the circular part being placed on the isolation region;
• and
• a cap insulating film buried in an upper portion of the gate groove and covering an upper surface of the gate electrode.

A semiconductor device comprising:

• a semiconductor substrate including first and second regions that have different conductivity types from each other;
• a shallow trench isolation region (STI) having a trench extending over the first and second regions and being filled with an insulative material;
• and
• a conductive material disposed in a groove that extends continuously over the first and second regions, the groove and the STI having overlapping regions, the insulative material of the STI being beneath the conductive material in the overlapping regions.