Semiconductor device controlling refresh operation for preventing wordline disturbance

A semiconductor memory device comprising:

• a memory cell array;
• a storage unit configured to store a number of times a first command has been provided to the memory cell array from a memory controller;
• a control unit configured to generate a second command operable to activate at least one word line in the memory cell array based on a comparison of the number stored at the storage unit with a threshold value;
• and
• a selection unit configured to select one of the first command and the second command based on a result of the comparison and transmit the selected command to the memory cell array,
• wherein the first command comprises a command operable to activate a first word line in the memory cell array.