Touch panel control circuit and semiconductor integrated circuit using the same

A touch panel control circuit configured to connect to a touch panel comprising a first plurality of electrodes arranged in a first direction and a second plurality of electrodes arranged in a second direction, wherein the first plurality of electrodes intersect the second plurality of electrodes to form a plurality of intersection capacitors, the touch panel control circuit comprising:

• a plurality of drive circuits configured to drive the first plurality of electrodes by applying a first number of pulses to the first plurality of electrodes in a predetermined period;
• a plurality of detection circuits coupled to the second plurality of electrodes, each detection circuit of the plurality of detection circuits configured to detect a capacitance value of a corresponding intersection capacitor of the plurality of intersection capacitors;
• and
• a sequence control circuit,
• wherein each detection circuit includes a first switched capacitor circuit that is coupled to each input terminal capable of being connected to the first plurality of electrodes, a first sample-and-hold circuit, a second switched capacitor circuit, a second sample-and-hold circuit, an integration circuit, and a third sample-and-hold circuit that retains an output of the detection circuit that are coupled in series,
• wherein the first switched capacitor circuit includes a first operational amplifier in which a first positive side input is fixed to a first predetermined potential, a first integration capacitor that is coupled between a first negative side input and a first output of the first operational amplifier, a first switch that is coupled between the first negative side input and the first output of the first operational amplifier, and a second switch that is coupled between the input terminal and the first negative side input of the first operational amplifier,
• wherein the second switched capacitor circuit includes a second operational amplifier in which a second positive side input is fixed to a second predetermined potential, a second integration capacitor that is coupled between a second negative side input and a second output of the second operational amplifier, and has a configuration in which a part or the entirety of a capacitance value is capable of being discharged by control, and a fourth switch that is coupled between an output of the first sample-and-hold circuit and the second negative side input of the second operational amplifier,
• wherein the integration circuit includes a third operational amplifier in which a third positive side input is fixed to a predetermined potential, a third integration capacitor that is coupled between a third negative side input and a third output of the third operational amplifier, a third switch that is coupled between the third negative side input and the third output of the third operational amplifier, and a fifth switch that is coupled between an output of the second sample-and-hold circuit and the third negative side input of the third operational amplifier, and
• wherein the sequence control circuit is configured to control a timing of turning on or off the first switch, the second switch, the third switch, the fourth switch, and the fifth switch of the detection circuit and a timing of discharging a part or the entirety of the second integration capacitor in synchronization with a timing of outputting the pulses with respect to the drive circuit.