Method and circuits for superclocking

A method, comprising:

• using one or more programmed processors to perform operations including:
• adding a circuit design having a first module instance to a netlist, wherein the first module instance is configured to process an input data stream at a superclocked clock frequency when enabled;
• adding one or more duplicate module instances that are functionally equivalent to the first module instance to the netlist, wherein the first module instance and the duplicate module instances form a set of module instances;
• and
• adding a control circuit to the netlist, wherein the control circuit is configured and arranged to:
• select one of the module instances from the set of module instances at a time, according to a selection algorithm;
• and
• in response to selecting one of the set of module instances, enable superclocked operation of the selected module instance and disable superclocked operation of the other ones of the set of module instances;
• placing and routing the netlist for implementation of circuits specified by the netlist using a set of programmable resources on a target programmable integrated circuit (IC) to produce a placed and routed netlist;
• adding a multiplexer and a demultiplexer to the netlist, wherein:
• the demultiplexer has an input terminal connected to an input node and a plurality of outputs, each respectively connected to an input terminal of a respective one of the set of module instances;
• the multiplexer has an output connected to an output node and a plurality of input terminals, each respectively connected to an output of a respective one of the set of module instances;
• and
• the set of programmable resources on the target programmable IC includes a plurality of configurable logic blocks and a plurality of interconnect circuits;
• programming the plurality of configurable logic blocks to implement electronic elements specified the placed and routed netlist;
• and
• programming the plurality of programmable interconnect circuits to form circuit connections specified by the placed and routed netlist and between the electronic elements.

A programmable integrated circuit (IC), comprising:

• an input/output (I/O) circuit configured to receive an input data stream;
• and
• a plurality of programmable resources including a plurality of configurable logic blocks and a plurality of interconnect circuits programmed to implement a circuit arrangement including:
• a circuit design including a first module instance configured to process the input data stream at a superclocked clock frequency when enabled;
• one or more duplicate module instances that are functionally equivalent to the first module instance, wherein the first module instance and the duplicate module instances form a set of module instances;
• and
• a control circuit coupled to the set of module instances;
• wherein the control circuit is configured to maintain continuous processing of the input data stream at the superclocked clock frequency by selecting and enabling one of the module instances at a time;
• wherein in response to selecting a module instance, the control circuit is configured to disable other ones of the modules instances, and
• wherein the plurality of configurable logic blocks are programmed to implement a plurality of circuits of the circuit arrangement and the plurality of interconnect circuits are programmed to form circuit connections between the plurality of circuits of the circuit arrangement.