Dynamic processor-memory revectoring architecture

A processing system, comprising:

• a memory management unit that is arranged to allocate and reallocate portions of memory for exclusive use by processors, the memory management unit including control inputs and a control output;
• a GNSS (global navigation satellite system) receiver processor that includes receiver processor memory, and that is arranged to enter an initial satellite acquisition state for which the memory management unit allocates a first portion of the receiver processor memory and to enter a subsequent processing state in which the GNSS receiver processor relinquishes one or more portions of the first portion of the receiver processor memory in response to a relinquishment request, the receiver processor including a memory control input coupled with the memory control output of the memory management unit, and memory control outputs coupled with the memory control inputs of the memory management unit;
• a general processor that is closely coupled to the receiver processor memory and is arranged to generate the relinquishment request and to receive allocation of the relinquished one or more portions of the first portion of the receiver processor memory by the memory management unit;
• and
• an ancillary memory system that is arranged to provide ancillary memory as allocated by the memory management unit for use by the general processor during the initial satellite acquisition state, the ancillary memory system including a memory control output coupled with a memory control input of the memory management unit.