Blank bit and processor instructions employing the blank bit

A non-transitory processor-readable storage medium having stored thereon a processor-executable machine code instruction means, the machine code instruction means comprising:

• (a) means for causing a first value to be stored in a bit if a first operand is equal to zero, otherwise causing a second value to be stored in the bit, wherein the bit is a bit in a flag register of a processor;
• and
• (b) means for causing the processor to perform an operation using the first operand, wherein upon completion of the performing of (b) the bit contains the value stored in the bit in (a), wherein the operation also uses a second operand, and wherein the means for causing in (a) further comprises:
• means for causing the first value to be stored in the bit if either:
• 1) the second operand is equal to zero and the first operand is not equal to zero, or 2) the second operand is equal to zero and the first operand is equal to zero, or 3) the second operand is not equal to zero and the first operand is equal to zero.

An integrated circuit comprising:

• a flag register;
• and
• an execution unit that executes a first machine code instruction and a second machine code instruction,
• (a) wherein the execution unit executes the first machine code instruction by:
• 1) storing a first value in a bit in the flag register if either a first operand or a second operand is equal to zero, otherwise storing a second value in the bit in the flag register if neither the first operand nor the second operand is equal to zero, and 2) after the storing in 1) performing a first operation using the first operand and the second operand;
• and
• (b) wherein the execution unit executes the second machine code instruction by:
• 1) performing a second operation if the bit is storing the first value, otherwise not performing the second operation.