Semiconductor structure and method for manufacturing the same
AssigneeMacronix International Co., Ltd.
InventorsErh-Kun Lai, Yen-Hao Shih
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Abstract
A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a plurality of stacks, a plurality of memory layers, a plurality of channel layers and a plurality of connecting portions. The stacks are disposed on the substrate. Each of the stacks comprises alternately-stacked conductive layers and insulating layers. The memory layers are disposed on sidewalls of the stacks, respectively. The channel layers are disposed on the memory layers, respectively, wherein each of the channel layers comprises a surface being exposed. The connecting portions connect the surface of each of the channel layers to the substrate, respectively.
Claims12
A method for manufacturing a semiconductor structure, comprising:
- forming a plurality of stacks on a substrate;
- forming a conformal memory layer over the stacks;
- forming a conformal channel layer over the conformal memory layer;
- forming a spacer layer on the conformal channel layer;
- and
- separating the spacer layer, the conformal channel layer and the conformal memory layer so as to form a plurality of memory layers, a plurality of channel layers and a plurality of spacers, wherein the memory layers are respectively formed on sidewalls of the stacks, the channel layers are respectively formed on the memory layers, a surface of each of the channel layers is exposed, and the spacers are respectively formed on the channel layers and expose the surface of each of the channel layers;
- and
- forming a plurality of connecting portions connecting the surface of each of the channel layers to the substrate, respectively, wherein the connecting portions are selective epitaxial growing layers.
A semiconductor structure, comprising:
- a substrate;
- a plurality of stacks disposed on the substrate, wherein each of the stacks comprises alternately-stacked conductive layers and insulating layers;
- a plurality of memory layers disposed on sidewalls of the stacks, respectively;
- a plurality of channel layers disposed on the memory layers, respectively, wherein each of the channel layers comprises a surface being exposed;
- a plurality of spacers disposed on the channel layers, respectively;
- and
- a plurality of connecting portions connecting the surface of each of the channel layers to the substrate, respectively, wherein the connecting portions are selective epitaxial growing layers.
Dependencies are inferred from the claim text.