Apparatus and method for reading a phase-change memory cell

An apparatus to read a phase-change memory cell, the apparatus comprising:

• a current ramp circuit to apply a current ramp to both a bitline of the phase-change memory cell and a dummy bitline;
• and
• a comparator configured to stop the current ramp when a storage voltage on the phase-change memory cell reaches a predefined value, the predefined value being independent of a resistance value of the phase-change memory cell.

A method of reading a phase-change memory cell, the method comprising:

• applying a current ramp to both a bitline and a dummy bitline, applying the current ramp including ramping current on the dummy bitline, the dummy bitline being a separate bitline from the bitline of the phase-change memory cell;
• and
• triggering a comparator to stop the current ramp when a storage voltage on the phase-change memory cell reaches a predefined value, the triggering of the comparator including providing the storage voltage from the dummy bitline.

A method of reading a phase-change memory cell, the method comprising:

• applying a current ramp to both a bitline and a dummy bitline, the dummy bitline being selected to include a dummy phase-change memory cell having a dummy storage cell and a dummy selector, the dummy phase-change memory cell being coupled to the dummy bitline through a dummy wordline;
• and
• triggering a comparator to stop the current ramp when a storage voltage on the phase-change memory cell reaches a predefined value.

A method of reading a phase-change memory cell, the method comprising:

• applying a current ramp to both a bitline and a dummy bitline, the dummy bitline being selected to include a dummy selector coupled to a dummy wordline, and not a dummy phase-change storage memory cell;
• and
• triggering a comparator to stop the current ramp when a storage voltage on the phase-change memory cell reaches a predefined value.