Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors

An information processing system capable of managing execution order of computer instructions in program order execution or in out-of-order execution, the information processing system comprising:

• a memory;
• and
• a processor communicatively coupled to the memory, wherein the processor is configured to perform a method comprising:
• creating, based on determining that execution of an instruction has encountered an operand store compare hazard, an entry within an operand store compare hazard prediction table, in which each entry in the table comprises
• at least an instruction address associated with an instruction, and
• a plurality of hazard indicating flags associated with the instruction, and wherein each hazard indicating flag can be set to a value to indicate whether a type of operand store compare hazard associated with the instruction has been encountered by the instruction, the entry being created comprising
• at least an instruction address of the instruction that has been executed, and
• a plurality of hazard indicating flags in which a first hazard indicating flag is set to a value associated with the instruction that has been executed, wherein the value of the first hazard indicating flag indicates a type of operand store compare hazard that the instruction that has been executed has encountered.

A method for managing execution order of load and store operations in a sequence of instructions for execution by a computer system, the method comprising:

• executing an instruction, the executed instruction consisting of at least one of a load instruction and a store instruction;
• determining, based on the executing, that an operand store compare hazard has been encountered;
• and
• based on the determining, creating an entry within an operand store compare hazard prediction table, the created entry being associated only with the executed instruction and comprising an instruction address of the instruction that has been executed and a hazard indicating flag associated with the instruction that has been executed, the hazard indicating flag indicating a type of operand store compare hazard and set to a value indicating that the instruction that has been executed has encountered the operand store compare hazard.