Integrated circuit decoupling capacitors
AssigneeAltera Corporation
InventorsIrfan Rahim, William Bradley Vest, Myron Wai Wong
Life of this patent
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Abstract
Power supply decoupling capacitors are provided for integrated circuits. The decoupling capacitors may be distributed in clusters amongst powered circuit components. Each cluster may contain a number of individual capacitor cells that are connected in parallel. Each capacitor cell may contain a capacitor and a resistor connected in series with the capacitor. The capacitors may be metal-insulator-metal (MIM) capacitors. The resistor in each cell may limit the current through an individual capacitor in the event of a short in the capacitor due to a dielectric defect.
Claims13
An integrated circuit comprising:
- a power supply voltage path on which an adjustable power supply voltage is provided;
- a ground power supply path;
- a plurality of power supply decoupling capacitors distributed in a plurality of parallel clusters on the integrated circuit, wherein the plurality of parallel clusters of capacitor cells are coupled between the power supply voltage path and the ground power supply path;
- a first power source that is coupled to a power supply voltage path and the ground power supply path and that outputs a first voltage;
- a second power source that is coupled to the power supply voltage path and the ground power supply path and that outputs a second voltage that is lower than the first voltage;
- a first region of memory cells;
- a first multiplexer that receives the first and second voltages and that selectively outputs the first voltage to the first region of memory cells in response to determining that the first region of memory cells is to be placed in a fast mode;
- a second region of memory cells;
- and
- a second multiplexer that receives the first and second voltages and that selectively outputs the second voltage to the second region of memory cells in response to determining that the second region of memory cells is to be placed in a slow mode.
An integrated circuit comprising:
- a plurality of distributed clusters of power supply decoupling capacitor cells, wherein the capacitor cells in each cluster are connected in parallel, and wherein each capacitor cell comprises:
- a capacitor;
- and
- a resistor connected in series with the capacitor, wherein the capacitor cells in each capacitor cell cluster are connected between first and second respective sets of interdigitated fingers formed in a common metal layer on the integrated circuit and wherein the capacitor in each cell comprises a cylindrical metal-insulator-metal capacitor.
An integrated circuit comprising:
- at least one power supply that supplies power across first and second power supply lines;
- a plurality of distributed power supply capacitor cell clusters, each capacitor cell cluster coupled across the first and second power supply lines, wherein each capacitor cell cluster comprises a plurality of capacitor cells coupled in parallel, and wherein each capacitor cell comprises:
- a capacitor;
- and
- a resistor coupled in series with the capacitor, wherein the resistor is formed from a source-drain implant region in a semiconductor substrate of the integrated circuit, wherein the capacitor cells in each capacitor cell cluster are coupled between first and second respective sets of interdigitated fingers formed in a common metal layer on the integrated circuit.
An integrated circuit comprising:
- at least one power supply that supplies power across first and second power supply lines;
- a plurality of distributed power supply capacitor cell clusters, each capacitor cell cluster coupled across the first and second power supply lines, wherein each capacitor cell cluster comprises a plurality of capacitor cells coupled in parallel, and wherein each capacitor cell comprises:
- a capacitor;
- and
- a resistor coupled in series with the capacitor, wherein the resistor is formed from a source-drain implant region in a semiconductor substrate of the integrated circuit, wherein the capacitor in each capacitor cell comprises a metal-insulator-metal capacitor, and wherein the integrated circuit is a programmable logic device containing programmable memory elements that are operable to produce static control signals and wherein the power supply is adjustable to produce at least two different positive power supply voltages across the first and second power supply lines in response to the static control signals.
Dependencies are inferred from the claim text.