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US 9,425,187 B1Granted
Apparatus and methods for modulating current / voltage response using multiple semi-conductive channel regions (SCR) produced from different integrated semiconductor structures
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorJeffrey L. Titus
Life of this patent
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Abstract
Apparatuses and methods for modulating current/voltage response using multiple semi-conductive channel regions (SCR) produced from different integrated semiconductor structures are provided. In particular, embodiments include systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using combined integrated functions of a lateral double-diffused metal-oxide semiconductor field effect transistor (LDMOSFET) and junction field effect transistor (JFET) disposed in proximity of a LDMOSFET's SCR within a certain orientation forming a second SCR.
Claims31
An electrical system comprising:
- a lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) section disposed in a substrate section, said LDMOSFET section comprising a LDMOSFET control gate, a source region, a drain region, and a LDMOSFET semi-conductive channel region (SCR) having a first, second, and third side in close proximity to a gate insulator region, wherein said first and second sides are on opposite sides and said third side is orthogonal to said first and second sides, wherein said first and second sides of LDMOSFET SCR are formed between said source region adjacent to said first side of LDMOSFET SCR and said drain region adjacent to said second side of LDMOSFET SCR, wherein said third side of LDMOSFET SCR is adjacent to said LDMOSFET control gate, said LDMOSFET control gate is also formed partially overlapping a section of said source region, said LDMOSFET control gate is also formed partially overlapping a section of said drain region, said LDMOSFET control gate is further disposed on said LDMOSFET third side SCR;
- and
- a junction field effect transistor (JFET) section disposed in said substrate section, said JFET section comprising a JFET control gate and a JFET SCR having a first and second side, wherein first and second side are opposing sides, where said first side of JFET SCR in close proximity to second side of said LDMOSFET SCR, where said second side of JFET SCR is in close proximity to said JFET control gate region, where said JFET control gate comprising an opposite dopant of said JFET SCR, said JFET control gate further formed comprising a doped region not in physical contact with said source region or said LDMOSFET control gate, positioned at a first distance from said LDMOSFET control gate, where said first distance determines a distance that an electromagnetic field generated by said JFET control gate must travel to traverse said JFET SCR, wherein said JFET control gate disposed within said drain region is positioned at said first distance to said LDMOSFET control gate.
An electrical system comprising:
- a lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) section configured to control a first portion of a first electrical path, said LDMOSFET section is formed with a LDMOSFET control gate, a LDMOSFET source region, a LDMOSFET drain region, and a LDMOSFET semi-conductive channel region (SCR) formed with a first SCR side, an opposing second SCR side and an orthogonal third SCR side, wherein said first SCR side adjacent to said source region, said second SCR side adjacent to said drain region, said third SCR side facing and in proximity with said LDMOSFET control gate, said LDMOSFET control gate controls a first electrical current passing through said first portion of said first electrical path comprising said LDMOSFET SCR;
- and
- a junction-field-effect transistor (JFET) section configured to control a second portion of said first electrical path, said JFET section is formed with a JFET control gate and a JFET SCR formed with a first SCR side, an opposing second SCR side, and an orthogonal third SCR side, wherein said JFET first SCR side adjacent to said LDMOSFET second SCR side, said JFET second SCR side adjacent to JFET control gate, and said JFET third SCR side adjacent to LDMOSFET control gate, wherein said JFET control gate is positioned at a first distance from said LDMOSFET second SCR side, where said first distance is determined by said JFET control gate generating an electromagnetic field to traverse from said JFET second SCR side to said JFET first SCR side, said JFET section controls a second electrical current passing through said second portion of said first electrical path comprising said JFET SCR;
- wherein operation of said LDMOSFET control gate modulates or controls said first electrical current passing through said LDMOSFET SCR and operation of said JFET control gate modulating or controlling said second electrical current passing through said JFET SCR.
1 more element
A method associated with an electrical system comprising:
- providing an electrical system comprising a lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) section configured to control a first portion of a first electrical path and a junction-field-effect transistor (JFET) section configured to control a second portion of said first electrical path;
- wherein said LDMOSFET section is formed with a LDMOSFET control gate, a LDMOSFET source region, a LDMOSFET drain region, and a LDMOSFET semi-conductive channel region (SCR) formed with a first SCR side, an opposing second SCR side and an orthogonal third SCR side, wherein said first SCR side adjacent to said source region, said second SCR side adjacent to said drain region, said third SCR side facing and in proximity with said LDMOSFET control gate, said LDMOSFET control gate controls a first electrical current passing through said first portion of said first electrical path comprising said LDMOSFET SCR;
- wherein said JFET section is formed with a JFET control gate and a JFET SCR formed with a first SCR side, an opposing second SCR side, and an orthogonal third SCR side, wherein said JFET first SCR side adjacent to said LDMOSFET second SCR side, said JFET second SCR side adjacent to JFET control gate, and said JFET third SCR side adjacent to LDMOSFET control gate, wherein said JFET control gate is positioned at a first distance from said LDMOSFET second SCR side, where said first distance is determined by said JFET control gate generating an electromagnetic field to traverse from said JFET second SCR side to said JFET first SCR side, said JFET section controls a second electrical current passing through said second portion of said first electrical path comprising said JFET SCR;
- wherein operation of said LDMOSFET control gate modulates or controls said first electrical current passing through said LDMOSFET SCR and operation of said JFET control gate modulating or controlling said second electrical current passing through said JFET SCR.
1 more element
Dependencies are inferred from the claim text.