Electrostatic discharge protection circuit
AssigneeMicrochip Technology Incorporated
InventorChe-Hong Chen
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AssigneeMicrochip Technology Incorporated
InventorChe-Hong Chen
Estimating the term…
The present invention discloses an electrostatic discharge protection circuit, comprising a diode and a N-type metal-oxide-semiconductor (NMOS) transistor. The diode locating on a N-well comprises an high P-doping concentration region and an nonadjacent high N-doping concentration region. The NMOS transistor, locating on a P-well, comprises a drain, a source and a gate, and the drain and the source are formed by the high N-doping concentration region. Wherein the P-well further comprises a high P-doping concentration region near the source, the drain of the NMOS is electrically connected to the high N-doping concentration region of the diode, the source of the NMOS and the adjacent high P-doping concentration region are electrically connected to a ground, the gate of the NMOS transistor electrically connected to a trigger point. Accordingly, the electrostatic discharge protection circuit has a low parasitic capacitance, wide operating voltage range and high electrostatic discharge (ESD) capability for resolving the problems about the ESD of the RX pins.
An electrostatic discharge protection circuit, formed by a diode and a metal-oxide-semiconductor (MOS) transistor set on a semiconducting substrate, comprising:
An electrostatic discharge protection circuit, comprising:
Dependencies are inferred from the claim text.