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US 9,337,812 B2Granted
Avalanche pulser
AssigneeNiitek, Inc.
InventorHoward M. Bandell
Life of this patent
Estimating the term…
Abstract
Circuits and methods for generating a pulse are provided. The generating can comprise receiving at least one trigger input signal with a pulse generating circuit; generating a voltage pulse having a duration less than the avalanche time of a transistor in response to at least a portion of the at least one trigger input signal with the pulse generating circuit; transmitting the voltage pulse from the pulse generating circuit to a terminal of the transistor, the transistor constructed and arranged to be operable in an avalanche mode; and outputting an avalanche pulse from at least one terminal of the transistor in response to the voltage pulse. In some embodiments, the pulse can be transmitted with an antenna in a radar system, and a return pulse can be received and processed.
Claims62
A circuit for generating a pulse comprising:
- a transistor constructed and arranged to be operable in an avalanche mode;
- a pulse generating circuit constructed and arranged to receive at least one trigger input signal, generate a voltage pulse having a duration less than an avalanche time of the transistor in response to at least a portion of the at least one trigger input signal, and transmit the voltage pulse to a terminal of the transistor;
- and
- at least one negative bias generator constructed and arranged to generate a negative voltage;
- wherein the pulse generating circuit comprises:
- at least one step recovery diode (SRD) referenced to the negative voltage at a cathode of the at least one SRD, wherein the SRD is constructed and arranged to receive the at least one trigger input signal at an anode of the at least one SRD, store charge when the at least one trigger input signal has a positive voltage, and stop storing charge when the at least one trigger input signal has a negative voltage;
- and
- at least one inductor constructed and arranged to generate the voltage pulse after the at least one SRD stops storing charge;
- and
- wherein the transistor is constructed and arranged to output an avalanche pulse from at least one terminal of the transistor in response to the voltage pulse.
7 more elements
A method for generating a pulse comprising:
- receiving at least one trigger input signal with a pulse generating circuit;
- generating a voltage pulse in response to at least a portion of the at least one trigger input signal with the pulse generating circuit;
- transmitting the voltage pulse from the pulse generating circuit to a terminal of a transistor constructed and arranged to be operable in an avalanche mode;
- outputting an avalanche pulse from at least one terminal of the transistor in response to the voltage pulse;
- and
- generating a negative voltage with at least one negative bias generator;
- wherein generating the voltage pulse comprises:
- receiving the at least one trigger input signal at an anode of at least one step recovery diode (SRD) referenced to the negative voltage at a cathode of the at least one SRD;
- storing charge with the SRD when the at least one trigger input signal has a positive voltage, and stopping storing charge with the SRD when the at least one trigger input signal has a negative voltage;
- and
- generating the voltage pulse with at least one inductor after the at least one SRD stops storing charge;
- and
- wherein the voltage pulse has a duration less than an avalanche time of the transistor.
10 more elements
A radar system comprising:
- an avalanche pulser circuit, the avalanche pulser circuit comprising:
- a transistor constructed and arranged to be operable in an avalanche mode;
- a pulse generating circuit constructed and arranged to receive at least one trigger input signal, generate a voltage pulse having a duration less than an avalanche time of the transistor in response to at least a portion of the at least one trigger input signal, and transmit the voltage pulse to a terminal of the transistor, wherein the transistor is constructed and arranged to output an avalanche pulse from at least one terminal of the transistor in response to the voltage pulse;
- an antenna connected to the avalanche pulser circuit, the antenna constructed and arranged to transmit the avalanche pulse and receive a return pulse;
- a processor connected to the antenna, the processor constructed and arranged to process the return pulse, generate image data, and transmit the image data to a display;
- and
- at least one negative bias generator constructed and arranged to generate a negative voltage;
- wherein the pulse generating circuit comprises:
- at least one step recovery diode (SRD) referenced to the negative voltage at a cathode of the at least one SRD, wherein the SRD is constructed and arranged to receive the at least one trigger input signal at an anode of the at least one SRD, store charge when the at least one trigger input signal has a positive voltage, and stop storing charge when the at least one trigger input signal has a negative voltage;
- and
- at least one inductor constructed and arranged to generate the voltage pulse after the at least one SRD stops storing charge.
8 more elements
A method for creating a radar image comprising:
- receiving at least one trigger input signal with a pulse generating circuit;
- generating a voltage pulse in response to at least a portion of the at least one trigger input signal with the pulse generating circuit;
- transmitting the voltage pulse from the pulse generating circuit to a terminal of a transistor constructed and arranged to be operable in an avalanche mode;
- outputting an avalanche pulse from at least one terminal of the transistor to an antenna in response to the voltage pulse;
- transmitting the avalanche pulse with the antenna;
- receiving a return pulse with the antenna;
- processing the return pulse with a processor to generate image data;
- transmitting the image data to a display;
- and
- generating a negative voltage with at least one negative bias generator;
- wherein generating the voltage pulse comprises:
- receiving the at least one trigger input signal at an anode of at least one step recovery diode (SRD) referenced to the negative voltage at a cathode of the at least one SRD;
- storing charge with the SRD when the at least one trigger input signal has a positive voltage, and stopping storing charge with the SRD when the at least one trigger input signal has a negative voltage;
- and
- generating the voltage pulse with at least one inductor after the at least one SRD stops storing charge;
- and
- wherein the voltage pulse has a duration less than an avalanche time of the transistor.
14 more elements
Dependencies are inferred from the claim text.