Insulated gate bipolar transistor

An insulated gate bipolar transistor comprising:

• a first semiconductor area of a first conductivity type;
• a second semiconductor area of a second conductivity type formed on one surface of the first semiconductor area;
• third semiconductor areas of the first conductivity type continuously formed in a length direction on one surface of the second semiconductor area;
• a plurality of trenches formed between the third semiconductor areas, extending to an inside of the second semiconductor area, and being continuous in the length direction;
• a fourth semiconductor area of the second conductivity type formed on one surface of the third semiconductor areas spaced apart from each other at predetermined intervals in the length direction;
• insulation layers formed inside the trenches;
• gate electrodes buried inside the insulation layers;
• and
• a barrier layer formed in locations corresponding to the third semiconductor areas inside the second semiconductor area,
• wherein the barrier layer is an oxide, and
• wherein the barrier layer is formed between an area corresponding to 5 μm apart from lower surfaces of the trenches in a thickness direction and the lower surfaces of the trenches.