Graphene transistor having tunable barrier
AssigneesSamsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
InventorsJin-hong Park, Jae-woo Shim, Hyung-youl Park, Jae-ho Lee
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Abstract
Provided are graphene transistors having a tunable barrier. The graphene transistor includes a semiconductor substrate, an insulating thin film disposed on the semiconductor substrate, a graphene layer on the insulating thin film, a first electrode connected to an end of the graphene layer, a second electrode that is separate from an other end of the graphene layer and contacts the semiconductor substrate, a gate insulating layer covering the graphene layer, and a gate electrode on the gate insulating layer, wherein an energy barrier is formed between the semiconductor substrate and the graphene layer.
Claims17
A graphene transistor having a tunable barrier comprising:
- a semiconductor substrate;
- an insulating thin film on the semiconductor substrate;
- a graphene layer on the insulating thin film;
- a first electrode connected to an end of the graphene layer;
- a second electrode, separate from an other end of the graphene layer, directly contacting the semiconductor substrate;
- a gate insulating layer covering at least a portion of the graphene layer;
- and
- a gate electrode on the gate insulating layer, and
- an insulating layer between the graphene layer and the insulating thin film at a location corresponding to the first electrode;
- wherein an energy barrier is between the semiconductor substrate and the graphene layer.
A graphene transistor having a tunable barrier comprising:
- a back gate substrate;
- a gate insulating layer on the back gate substrate;
- a graphene layer on the gate insulating layer;
- a first electrode on a first region of the graphene layer;
- and
- a semiconductor layer, an insulating thin film and a second electrode stacked on a second region of the graphene layer, the second region of the graphene layer being distinct from the first region of the graphene layer;
- wherein an energy barrier is between the semiconductor layer and the graphene layer.
Dependencies are inferred from the claim text.