Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsJeong-Yun Lee, Moo-Jin Kim
Life of this patent
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Abstract
A semiconductor device includes a semiconductor substrate having a capacitor region and a resistor region. A capacitor dielectric material and a capacitor electrode are sequentially stacked on an active region in the capacitor region of the semiconductor substrate. A resistor is provided on the resistor region of the semiconductor substrate. A protection pattern is provided on a top surface of the capacitor electrode. The protection pattern is spaced apart from the capacitor electrode. The protection pattern and the resistor include the same material and have the same thickness in a direction vertical to a surface of the semiconductor substrate.
Claims19
A semiconductor device comprising:
- a semiconductor substrate having a capacitor region and a resistor region;
- a capacitor dielectric material and a capacitor electrode sequentially stacked on an active region of the capacitor region of the semiconductor substrate;
- a resistor on the resistor region of the semiconductor substrate;
- and
- a protection pattern on a top surface of the capacitor electrode and spaced apart from the capacitor electrode,
- wherein the protection pattern and the resistor include a same material and have a same thickness in a direction vertical to a surface of the semiconductor substrate.
A semiconductor device comprising:
- an insulating pattern in a semiconductor substrate and configured to define an active region;
- a dielectric material and a conductive pattern sequentially stacked on the active region;
- a lower insulating layer over a portion of the semiconductor substrate having the insulating pattern and the conductive pattern;
- a first silicon pattern on the lower insulating layer and configured to vertically overlap a top surface of the conductive pattern;
- a second silicon pattern on the lower insulating layer and spaced apart from the first silicon pattern;
- an upper insulating layer on the lower insulating layer and configured to cover the first and second silicon patterns;
- a first interconnection on the upper insulating layer and electrically connected to the conductive pattern;
- and
- a second interconnection on the upper insulating layer and electrically connected to the second silicon pattern,
- wherein the first and second silicon patterns have a same thickness in a direction vertical to a surface of the semiconductor substrate.
A semiconductor device comprising:
- a semiconductor substrate including first and second regions;
- a dielectric material and a conductive pattern sequentially stacked on the first region of the semiconductor substrate;
- a first semiconductor pattern on a top surface of the conductive pattern and spaced apart from the conductive pattern, the first semiconductor pattern having a first width;
- and
- a second semiconductor pattern on the second region of the semiconductor substrate, the second semiconductor pattern having a second width less than the first width,
- wherein a top surface of the second semiconductor pattern is at a lower level than a bottom surface of the first semiconductor pattern.
Dependencies are inferred from the claim text.