Reconfigurable flip-flop
AssigneeFreescale Semiconductor, Inc.
InventorRavindraraj Ramaraju
Life of this patent
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Abstract
A device (300, 1000) provides a dual-edge triggered flip-flop (DETFF) that is reconfigurable to a master-slave flip-flop (MSFF). The device includes a reconfigurable MUX-D flip-flop including two distinct circuit configurations. In a first configuration, two latches or storage elements (340, 360, 1040, 1060) are operating in series to provide a MUX-D flip-flop. In a second configuration, the storage elements (340, 360, 1040, 1060) are operating in parallel to provide a dual-edge triggered flip-flop (DETFF).
Claims20
A reconfigurable flip-flop circuit, comprising:
- an input;
- a common output;
- a first storage element including an input electrically coupled to the input through at least a first storage element input switch, and an output electrically coupled to a first storage element output switch;
- a second storage element including an input electrically coupled to the input through at least a second storage element input switch, and an output electrically coupled to a second storage element output switch;
- a third storage element including an input/output node electrically coupled to the second storage element output switch, and the input/output node electrically coupled to the common output;
- and
- control circuitry, the control circuitry configured such that during a first mode of operating, the control circuitry configures each of the first storage element and the second storage element to operate as a latch in a dual-edge triggered flip-flop, and during a second mode of operating, the control circuitry configures the second storage element to operate as a latch in a master-slave flip-flop,
- wherein during the first mode of operating, the control circuitry couples in parallel the first storage element and the second storage element, and
- wherein the first storage element output switch and the second storage element output switch are coupled to the common output.
A reconfigurable flip-flop circuit, comprising:
- an input;
- a common output;
- a first storage element including an input electrically coupled to the input through at least a first storage element input switch, and an output electrically coupled to a first storage element output switch;
- a second storage element including an input electrically coupled to the input through at least a second storage element input switch, and an output electrically coupled to a second storage element output switch;
- a third storage element including an input/output node electrically coupled to the second storage element output switch, and the input/output node electrically coupled to the common output;
- control circuitry that configures each of the first storage element and the second storage element to operate as a latch in a dual-edge triggered flip-flop during a first mode of operating, and that configures the second storage element to operate as a latch in a master-slave flip-flop during a second mode of operating;
- and
- a cross-storage element switch with a first terminal and a second terminal, the first terminal electrically coupled to the output of the first storage element and the second terminal electrically coupled to the input of the second storage element,
- wherein the first storage element output switch and the second storage element output switch are coupled to the common output.
A reconfigurable flip-flop circuit, comprising:
- an input;
- a common output;
- a first storage element including an input electrically coupled to the input through at least a first storage element input switch, and an output electrically coupled to a first storage element output switch;
- a second storage element including an input electrically coupled to the input through at least a second storage element input switch, and an output electrically coupled to a second storage element output switch;
- a third storage element including an input/output node electrically coupled to the second storage element output switch, and the input/output node electrically coupled to the common output;
- control circuitry that configures each of the first storage element and the second storage element to operate as a latch in a dual-edge triggered flip-flop during a first mode of operating, and that configures the second storage element to operate as a latch in a master-slave flip-flop during a second mode of operating;
- and
- a cross-storage element switch with a first terminal and a second terminal, the first terminal electrically coupled to the output of the first storage element and the second terminal electrically coupled to the input of the second storage element,
- wherein during the first mode of operating, the control circuitry couples in parallel the first storage element and the second storage element, and during the second mode of operating, the control circuitry couples in series the first storage element and the second storage element through at least the cross-storage element switch.
Dependencies are inferred from the claim text.