Fabrication method for high-density MRAM using thin hard mask

#The present invention relates generally to designs and fabrication methods for non-volatile magnetic random access memory (MRAM) and particularly to methods for fabricating resistive memory cells in high density arrays incorporating a small feature size with minimized pitch for magnetic tunnel junction (MTJ).

#The memories such as RRAM (Resistive Random Access Memory), PRAM (Phase Change Random Access Memory) and MRAM (Magnetic Random Access Memory) have a resistive device as a memory element. The high speed access and the non-volatility at power off of these devices make these promising technologies to replace existing memories.

#The resistive memory devices consisting of a top electrode, a bottom electrode and the resistive memory element in between are fabricated in an array of pillar shapes on a wafer using a conventional lithography and dry etching process. A memory element MTJ (Magnetic Tunnel Junction) in an MRAM cell includes at least a pinned layer, a free layer and barrier (or junction) layer separating the pinned and free layers. The conventional patterning processes for MRAM cells includes hard mask patterning, top electrode patterning, MTJ patterning and bottom electrode patterning processes. As the device size shrinks and the cell array becomes denser, the conventional method for MTJ etching is reaching its limit in process capabilities. MTJ reactive ion etching (RIE) can result clean in sidewalls without re-deposited material across the barrier layer. However, the presence of reactive ion species during etching results in chemical reactions with MTJ layers at the sidewall of the MTJ pillar which possibly degrades and damages the magnetic properties. The presence of the damaged material may not be important when the size of the damaged area is minor compared to the non-damaged portion inside the MTJ pillar. However, the decrease of the MTJ feature size increases the total ratio of the damaged MTJ and can result in loss of the magnetic properties and increased magnetic property variation across the wafer as well.

#FIGS. 1A-C illustrate a cross sectional view, perpendicular to the substrate surface, of a selected stage of an IBE incident angle with a selected hard mask thickness of 100 nm and different MTJ feature sizes for the high density 2 F pitch MTJ array according to the prior art.

#FIGS. 2A-C illustrate a cross sectional view, perpendicular to the substrate surface, of a selected stage of an IBE incident angle with different MTJ feature sizes for the high density 2 F pitch MTJ array and a selected hard mask thickness of 20 nm used in embodiments of the invention.

#FIGS. 3 to 12 illustrate a cross sectional view, perpendicular to the substrate surface, of selected stages of the fabrication process of MTJ MRAM cells according to the first embodiment of the invention. In FIG. 3 MTJ stack and the hard mask/top electrode is deposited on the control device which is not described herein.

#In the following description of the embodiments, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration of specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized without departing from the scope of the present invention. It should be noted that the figures discussed herein are not drawn to scale and thicknesses of lines are not indicative of actual sizes. The cross section view in the figures is generally taken through the approximate center the memory cell in a plane perpendicular to the substrate unless otherwise noted. Although only one to three cells are shown in the figures, the method may be used for the simultaneous fabrication of a many cells in an array on a wafer according to standard techniques.

#FIGS. 2A-C illustrates how the thin hard mask used in embodiments of the invention allow increased IBE incident angles. The figures show a cross sectional view taken perpendicular to the substrate surface of a selected stage of fabrication of MTJ cells. The IBE incident angle that can be used with a selected hard mask thickness of 20 nm according to an embodiment of the invention and different MTJ feature (F) sizes for the high density 2 F pitch MTJ array. In each of the embodiments described below, a residual pad of hard mask material, which serves as the top electrode, remains on top of the MTJ pillar after patterning. It is the thickness of this residual hard mask pad that is relevant for IBE processing. The examples in the figures use a thickness 20 nm, but the thickness range of this pad in both first and second embodiments is preferably between 10˜40 nm. In the second embodiment, which uses a bi-layer, all the upper hard mask will be removed after MTJ etching, therefore, it is the thickness of the remaining lower hard mask layer pad that determines the limit on the IBE angle. The height of the MTJ pillar which includes MTJ itself and BE is estimated as 30 nm.

#By using a hard mask thickness preferably between 10˜40 nm IBE incident angles are substantially increased in comparison to the angles shown in FIGS. 1A-C. For example as shown in FIG. 2C, for a 20 nm feature size, using a hard mask thickness of 20 nm allows for an incident beam angle of 25 degrees to reach to the sidewall of the bottom layer in the MTJ pillar. However, the goal of the IBE is to clean the sidewall of junction layer (typically MgO) of re-deposited material and to remove any chemically damaged portion of the sidewall of the free layer. Therefore, it is not necessarily required that the ion beam reach the sidewall of the entire MTJ pillar. For example, if the free layer is above the junction layer, the IBE can be targeted to where the junction layer and free layer are in the pillar. In this particular case the IBE angle does not have to be restricted to 25 degrees and can be increased to the 52 degree angle illustrated as reaching the upper magnetic layer, which is immediately below the hard mask/top electrode.