PFC LED driver having a flicker control mechanism

A PFC LED driver having a flicker control mechanism, comprising:

• a bridge rectifier, used to generate a full-wave-rectified line input voltage according to an AC power;
• a single stage PFC constant average current converter, coupled with said bridge rectifier and used for forcing an input current to track said full-wave-rectified line input voltage and regulating an average value of an output current at a first preset value;
• a current ripple reducing unit, in series with an LED module to form a load for said output current to flow through, wherein said current ripple reducing unit has a negative feedback control mechanism for forcing a peak of said output current approach an average value of said output current;
• a first NMOS transistor, having a first gate, a first drain, and a first source, said first gate being coupled with said first drain;
• a first resistor, having one end coupled with said first source, and another end coupled to a ground;
• a second NMOS transistor, having a second gate, a second drain, and a second source, said second gate being coupled with said first gate, and said second drain being coupled with said LED module;
• a second resistor, having one end coupled with said second source, and another end coupled to said ground;
• a peak detector, having an input coupled with said second source, and an output for providing a first voltage corresponding to a peak value of said output current;
• a low-pass filter, having an input coupled with said second source, and an output for providing a second voltage corresponding to an average value of said output current;
• a comparator, having a positive input for receiving said first voltage, a negative input for receiving said second voltage, and an output for providing a comparison signal;
• and
• a variable peak current setting unit, having an input for receiving said comparison signal, and an output coupled with said first drain for providing a peak control current, wherein said peak control current increases/decreases as a high level period of said comparison signal decreases/increases.