3D semiconductor device and 3D logic array structure thereof
AssigneeMacronix International Co., Ltd.
InventorShih-Hung Chen
Life of this patent
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Abstract
A 3D semiconductor device and a 3D logic array structure thereof are provided. The 3D semiconductor device includes an array structure, a periphery line structure and a 3D logic array structure. The array structure has Y contacts located at a side of the array structure. Y is within MN-1 to MN. Y, M and N are natural numbers. M is larger or equal to 2. The 3D logic array structure includes N sets of gate electrodes, an input electrode and Y output electrodes. Each set of the gate electrodes has M gate electrodes. The Y output electrodes connect the Y contacts. The M·N gate electrodes and the input electrode connect the periphery line structure.
Claims7
A 3D logic array structure, comprising:
- N sets of gate electrodes, wherein each set of the gate electrodes has M gate electrodes;
- an input electrode;
- and
- Y output electrodes, wherein the Y output electrodes connect Y contacts of an array structure, the Y contacts are located at a side of the array structure, the M·N gate electrodes and the input electrode connect a periphery line structure, Y is within MN-1 to MN, Y, M and N are natural numbers, and M is larger or equal to 2.
Dependencies are inferred from the claim text.