Semiconductor device, semiconductor unit, and power semiconductor device

A semiconductor unit, comprising:

• a semiconductor device including:
• an insulating substrate;
• a first electrode pattern and a second electrode pattern provided apart from each other on a major surface of the insulating substrate;
• a first semiconductor element connected to the first electrode pattern;
• a second semiconductor element connected to the first electrode pattern;
• a third semiconductor element connected to the second electrode pattern;
• a fourth semiconductor element connected to the second electrode pattern;
• an electrode terminal connected to the second electrode pattern;
• a connection wiring electrically connecting the first electrode pattern and the second electrode pattern with each other and having a thermal resistance larger than that of the first electrode pattern;
• a first connection member connecting the first electrode pattern and the first semiconductor element to each other;
• a second connection member connecting the second electrode pattern and the electrode terminal to each other and having a melting point lower than that of the first connection member;
• and
• a package accommodating therein at least the first semiconductor element, the connection wiring, and a part of the electrode terminal, wherein
• the insulating substrate includes a first insulating substrate on which the first electrode pattern is provided and a second insulating substrate on which the second electrode pattern is provided, the second insulating substrate being provided apart from the first insulating substrate,
• the first semiconductor element and the second semiconductor element each comprise a switching element respectively configured to be in a conducting state during different operating periods,
• the third semiconductor element and the fourth semiconductor element each comprise a switching element respectively configured to be in a conducting state during different operating periods,
• the first semiconductor element and the third semiconductor element each comprise a switching element respectively configured to be in a conducting state during operating periods which overlap with each other at least in a part thereof, and
• the second semiconductor element and the fourth semiconductor element each comprise a switching element respectively configured to be in a conducting state during operating periods which overlap with each other at least in a part thereof.

A power semiconductor device, comprising;

• an insulating substrate;
• a first electrode pattern and a second electrode pattern provided apart from each other on a major surface of the insulating substrate;
• a first power semiconductor element connected to the first electrode pattern;
• a second power semiconductor element connected to the first electrode pattern;
• a third power semiconductor element connected to the second electrode pattern;
• a fourth power semiconductor element connected to the second electrode pattern;
• an electrode terminal connected to the second electrode pattern;
• a connection wiring electrically connecting the first electrode pattern to the second electrode pattern and having a thermal resistance larger than a thermal resistance of the first electrode pattern;
• a first connection member connecting the first electrode pattern to the first power semiconductor element;
• and
• a second connection member connecting the second electrode pattern to the electrode terminal and having a melting point lower than that of the first connection member, wherein
• the insulating substrate includes a first insulating substrate on which the first electrode pattern is provided and a second insulating substrate on which the second electrode pattern is provided, the second insulating substrate being provided apart from the first insulating substrate,
• the first power semiconductor element and the second power semiconductor element each comprise a switching element respectively configured to be in a conducting state during different operating periods,
• the third power semiconductor element and the fourth power semiconductor element each comprise a switching element respectively configured to be in a conducting state during different operating periods,
• the first power semiconductor element and the third power semiconductor element each comprise a switching element respectively configured to be in a conducting state during operating periods which overlap with each other at least in a part thereof, and
• the second power semiconductor element and the fourth power semiconductor element each comprise a switching element respectively configured to be in a conducting state during operating periods which overlap with each other at least in a part thereof.