Semiconductor light emitting device

A semiconductor light emitting device, comprising:

• a first semiconductor layer having a first surface and a second surface opposite to the first surface, the second surface having a p-side region and a plurality of n-side regions;
• a light emitting layer provided on the p-side region;
• a second semiconductor layer provided on the light emitting layer;
• a p-side electrode provided on the second semiconductor layer, the p-side electrode being reflective to light emitted by the light emitting layer;
• a plurality of n-side electrodes provided respectively on the plurality of n-side regions;
• an insulating film provided on the second semiconductor layer and being sandwiched between respective ones of the plurality of n-side electrodes;
• and
• an n-side reflecting electrode having a plurality of n-side vias connected respectively to the plurality of n-side electrodes, and a linking portion provided on the insulating film and linking the plurality of n-side vias,
• wherein a bottom surface of the linking portion is coplanar with a to surface of the insulating film and with a to surface of each of the plurality of n-side vias, a reflectance of the n-side reflecting electrode for the light emitted by the light emitting layer is higher than a reflectance of the n-side electrodes for the light emitted by the light emitting layer, and the n-side reflecting electrode is made of a same material as the p-side electrode.

A semiconductor light emitting device, comprising:

• a first semiconductor layer having a first surface and a second surface opposite to the first surface, the second surface having a p-side region and a plurality of n-side regions;
• a light emitting layer provided on the p-side region;
• a second semiconductor layer provided on the light emitting layer;
• a p-side electrode provided on the second semiconductor layer, the p-side electrode being reflective to light emitted by the light emitting layer;
• a plurality of n-side electrodes provided respectively on the plurality of n-side regions;
• a first insulating film provided on the p-side electrode and on the plurality of n-side electrodes;
• a p-side interconnect unit provided on the first insulating film to connect to the p-side electrode through a first via piercing the first insulating film;
• a plurality of second vias provided respectively on the plurality of n-side electrodes and piercing the first insulating film;
• and
• an n-side interconnect unit provided on the first insulating film to commonly connect to the plurality of n-side electrodes through the plurality of second vias,
• wherein a bottom surface of the n-side interconnect unit is coplanar with a top surface of the first insulating film and with a to surface of each of the plurality of second vias, and the plurality of n-side regions are separated from each other without being linked at the second surface.