Silicon carbide MOS semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorsShun-ichi Nakamura, Yoshiyuki Yonezawa, Masahide Gotoh
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AssigneeFuji Electric Co., Ltd.
InventorsShun-ichi Nakamura, Yoshiyuki Yonezawa, Masahide Gotoh
Estimating the term…
A silicon carbide MOS semiconductor device is disclosed which suppresses degradation of efficiency percentage yield with respect to a breakdown voltage even when a surface region with a high impurity concentration is formed by ion implantation with such a high dose as required for attaining a good ohmic contact. The device has a silicon carbide semiconductor substrate, a voltage blocking layer of a first conductivity type formed on the substrate, a body region of a second conductivity type formed on the voltage blocking layer, a body contact region of the second conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the body contact region having such a high impurity concentration as to impart an ohmic contact, a source contact region of the first conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the source contact region having such a high impurity concentration as to impart an ohmic contact, and a source extension region with an impurity concentration lower than that in the source contact region under the source contact region at a region deeper than a tail part of a bottom region of the source contact region by selective ion implantation, the source extension region having an impurity concentration less than 3×1019 cm−3.
A silicon carbide MOS semiconductor device comprising:
Dependencies are inferred from the claim text.