Back to results
US 9,040,983 B2Granted
Passivation layer structure of semiconductor device and method for forming the same
AssigneeIndustrial Technology Research Institute
InventorsWen-Ching Sun, Tzer-Shen Lin, Sheng-Min Yu
Life of this patent
Estimating the term…
Abstract
A passivation layer structure of a semiconductor device is provided, which includes a passivation layer formed of halogen-doped aluminum oxide and disposed on a semiconductor layer on a substrate, in which the semiconductor layer includes indium gallium zinc oxide (IGZO) or nitride-based III-V compounds. A method for forming the passivation layer structure of a semiconductor device is also disclosed.
Claims24
A passivation layer structure of a semiconductor device, comprising:
- a semiconductor layer disposed on a substrate, wherein a surface of the semiconductor layer comprises metal oxides or nitride-based III-V compounds;
- and
- a passivation layer structure disposed on the semiconductor layer, wherein the passivation layer structure comprises a halogen-doped aluminum oxide layer including an aluminum oxide layer and at least a halogen dopant doped therein.
A passivation layer structure of a high electron mobility transistor, comprising:
- a semiconductor layer disposed on a substrate, wherein a surface of the semiconductor layer comprises intrinsic or n-type III-V compounds;
- and
- a passivation layer structure disposed on the semiconductor layer, wherein the passivation layer structure comprises a halogen-doped aluminum oxide layer including an aluminum oxide layer and at least a halogen dopant doped therein.
Dependencies are inferred from the claim text.