Methods for fabricating integrated circuits having gate to active and gate to gate interconnects
AssigneeGlobalfoundries Inc.
InventorsThilo Scheiper, Stefan Flachowsky, Andy Wei
Life of this patent
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AssigneeGlobalfoundries Inc.
InventorsThilo Scheiper, Stefan Flachowsky, Andy Wei
Estimating the term…
Methods are provided for fabricating an integrated circuit that includes gate to active contacts. One method includes forming a dummy gate structure including a dummy gate electrode having sidewalls and overlying a semiconductor substrate and first and second sidewall spacers on the sidewalls of the dummy gate electrode. The method includes removing the dummy gate electrode to form a trench bounded by the first and second sidewall spacers. The method removes an upper portion of the first sidewall spacer and deposits a layer of metal in the trench and over a remaining portion of the first sidewall spacer to form a gate electrode and an interconnect.
A method of fabricating an integrated circuit, the method comprising:
A method of fabricating an integrated circuit, the method comprising:
Dependencies are inferred from the claim text.