Releasable buried layer for 3-D fabrication and methods of manufacturing

A method, comprising:

• providing a releasable layer over a Si substrate;
• forming wiring layers upon the releasable layer;
• and
• bonding the wiring layers to a substrate using reflow processes, wherein:
• the releaseable layer is formed to withstand semiconductor back end of the line processing of greater than 300° C. without detaching from the Si substrate, and
• the releaseable layer is formed to detach from the Si substrate after BEOL processing,
• wherein the releaseable layer comprises a p-SiCOH layer comprising BCHD (bicycloheptadiene) and DEMS (diethoxymethylsilane).

A method, comprising:

• providing a releasable layer over a Si substrate;
• forming wiring layers upon the releasable layer;
• and
• bonding the wiring layers to a substrate using reflow processes, wherein:
• the releaseable layer is formed to withstand semiconductor back end of the line processing of greater than 30020 C. without detaching from the Si substrate, and
• the releaseable layer is formed to detach from the Si substrate after BEOL processing,
• wherein the releasable layer is a carbon rich dielectric releasable layer.

A method, comprising:

• providing a releasable layer over a Si substrate;
• forming wiring layers upon the releasable layer;
• and
• bonding the wiring layers to a substrate using reflow processes, wherein:
• the releaseable layer is formed to withstand semiconductor back end of the line processing of greater than 300° C. without detaching from the Si substrate, and
• the releaseable layer is formed to detach from the Si substrate after BEOL processing,
• wherein the releaseable layer detaches from the Si substrate during a cooling down process of a solder bonding processes.