Chip assembly with a coreless substrate employing a patterned adhesive layer

A method of forming a bonded stack of a coreless substrate and a chip, said method comprising:

• forming a stack, from bottom to top, of a stiffener, a patterned adhesive layer, and a coreless substrate layer including at least one coreless substrate integrally incorporated therein, wherein said patterned adhesive layer includes a plurality of holes therein;
• bonding at least one chip to said at least one coreless substrate;
• and
• dicing said coreless substrate layer to isolate at least one bonded stack of a coreless substrate and a chip along vertical planes that include a closed periphery that does not overlie any area of said patterned adhesive layer, wherein said stiffener is not diced during said dicing of said coreless substrate layer.

A method of forming a bonded stack of a coreless substrate and a chip, said method comprising:

• forming a stack, from bottom to top, of a stiffener, a patterned adhesive layer, and a coreless substrate layer including at least one coreless substrate integrally incorporated therein, wherein said patterned adhesive layer includes a plurality of holes therein;
• bonding at least one chip to said at least one coreless substrate;
• dicing said coreless substrate layer to isolate at least one bonded stack of a coreless substrate and a chip along vertical planes that include a closed periphery that does not overlie any area of said patterned adhesive layer;
• applying a blanket adhesive layer to a back side surface of said coreless substrate layer;
• and
• applying a photoresist to said blanket adhesive layer and lithographically patterning said photoresist.