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US 9,040,354 B2Granted
Chip comprising a fill structure
AssigneeInfineon Technologies AG
InventorsGunther Mackh, Gerhard Leschik, Adolf Koller, Harald Seidl
Life of this patent
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Abstract
A chip includes a dielectric layer and a fill structure in the dielectric layer, wherein the fill structure extends along a dicing edge of the chip, with the fill structure abutting the dicing edge.
Claims28
A method of manufacturing a plurality of chips, the method comprising:
- forming a dielectric layer over a substrate comprising dicing lines for singulating the substrate;
- forming a fill structure having a periodic structure in the dielectric layer, wherein the fill structure is disposed between regions of the substrate comprising the plurality of chips, wherein the periodic structure has a first periodicity with a first periodic pitch in a first lateral direction and having a second periodicity with a second periodic pitch in a second lateral direction perpendicular to the first lateral direction, and wherein a width of each of the dicing lines is less than 100 μm, and wherein the first periodic pitch is less than 20 μm;
- and
- singulating the substrate through the dicing lines to form the plurality of chips.
1 more element
A method for manufacturing a plurality of chips, the method comprising:
- providing a wafer comprising a dielectric layer, wherein the wafer comprises a fill structure of the dielectric layer within a dicing line, wherein the fill structure forms a periodic structure, and a plurality of chip areas separated by at least the dicing line, wherein the periodic structure comprises a first periodicity with a first periodic pitch in a first lateral direction and a second periodicity with a second periodic pitch in a second lateral direction perpendicular to the first lateral direction, wherein the first periodic pitch is a different pitch from the second periodic pitch, and wherein the first periodic pitch and the second periodic pitch are both smaller than 5 μm;
- and
- singulating the plurality of chips along the dicing line.
A method for manufacturing a plurality of chips, the method comprising:
- forming a plurality of chip areas separated by at least a dicing line within a wafer;
- forming a dielectric layer over the wafer;
- and
- forming a fill structure within the dicing line in the dielectric layer, wherein the fill structure forms a periodic structure extending in a lateral dimension parallel and perpendicular to the dicing line, and wherein the fill structure laterally occupies more than 25% of the dicing line, wherein the periodic structure comprises a first periodicity with a first periodic pitch in the lateral direction and a second periodicity with a second periodic pitch in the perpendicular direction, wherein the first periodic pitch is a different pitch from the second periodic pitch.
1 more element
Dependencies are inferred from the claim text.