Stack packages having fastening element and halogen-free inter-package connector

A method of manufacturing a stack package, the method comprising:

• preparing an upper package in which an upper semiconductor chip and an upper inter-package connector are disposed on opposite surfaces of an upper package substrate;
• preparing a lower package in which a lower semiconductor chip and a lower inter-package connector are disposed on a same surface of a lower package substrate and a molding material contacts side surfaces of the lower semiconductor chip and contacts side surfaces of the lower inter-package connector, the molding material including an opening to expose a top surface of the lower inter-package connector;
• providing a fastening element between a top surface of the lower semiconductor chip and a bottom surface of the upper package substrate;
• and
• performing a first annealing to cure the fastening element and remove flux having a halogen element from the upper inter-package connector and the lower inter-package connector;
• and
• performing a second annealing to integrate the upper inter-package connector and the lower inter-package connector,
• wherein the first annealing is performed in a gas atmosphere containing hydrogen.

A method of manufacturing a stack package, the method comprising:

• preparing an upper package comprising:
• an upper package substrate,
• a first upper land and a upper semiconductor chip disposed on a top surface of the upper package substrate,
• a second upper land disposed on a bottom surface of the upper package substrate, and
• an upper inter-package connector disposed on the second upper land;
• preparing a lower package comprising:
• a lower package substrate,
• a first lower land and a lower semiconductor chip disposed on a top surface of the lower package substrate,
• a second lower land disposed on a bottom surface of the lower package substrate,
• a lower inter-package connector disposed on the first lower land, and
• a lower molding material surrounding side surfaces of the lower semiconductor chip, the lower molding material having an opening to expose a top surface of the lower inter-package connector;
• providing a fastening element on a top surface of the lower semiconductor chip;
• stacking the upper package on the lower package;
• performing a first annealing process to cure the fastening element and remove flux having a halogen element from the upper inter-package connector and the lower inter-package connector;
• performing a second annealing process to integrate and connect the upper inter-package connector and the lower inter-package connector.