Diode-based devices and methods for making the same

A method of forming a diode, the method comprising:

• depositing a layer of a dielectric material onto a substrate;
• patterning first and second openings in the dielectric material to expose portions of the substrate, the first and second openings extending from an upper surface of the dielectric material to the substrate, each of the openings having an aspect ratio of at least 1;
• forming a first bottom diode region by growing a compound semiconductor material that is lattice mismatched to the substrate in the first opening and above the upper surface of the dielectric material;
• forming a second bottom diode region by growing a compound semiconductor material that is lattice mismatched to the substrate in the second opening and above the upper surface of the dielectric material;
• forming a first active diode region adjacent the first bottom diode region;
• forming a second active diode region adjacent the second bottom diode region;
• and
• forming a single top diode region laterally adjacent the first active diode region and the second active diode region, the single top diode region directly adjoining the upper surface of the dielectric material between the first opening and the second opening.

A method comprising:

• forming a dielectric layer over a substrate;
• forming a first trench and a second trench in the dielectric layer to the substrate;
• forming a first fin as a first bottom diode region, the first fin comprising a compound semiconductor material that is lattice mismatched to the substrate, the first fin being in the first trench and extending above the first trench, the first fin having a first sidewall extending away from the dielectric layer;
• forming a second fin as a second bottom diode region, the second fin comprising a compound semiconductor material that is lattice mismatched to the substrate, the second fin being in the second trench and extending above the second trench, the second fin having a second sidewall extending away from the dielectric layer, a plane intersecting the first sidewall of the first fin and the second sidewall of the second fin;
• forming a first active diode region adjacent the first sidewall of the first fin, the first active diode region having a third sidewall extending away from the dielectric layer;
• forming a second active diode region adjacent the second sidewall of the second fin, the second active diode region having a fourth sidewall extending away from the dielectric layer;
• and
• forming a top diode region disposed at least in part between the third sidewall of the first active diode region and the fourth sidewall of the second active diode region, the plane further intersecting the third sidewall of the first active diode region, the fourth sidewall of the second active diode region, and the top diode region disposed at least in part between the third sidewall and the fourth sidewall.