Processing packet streams

A method of processing packet streams, the method comprising:

• retrieving secure packets from a system memory via a data bus by a first processor connected to a second processor and to the system memory via the data-bus;
• controlling, at the first processor, security processing of the retrieved secure packets by the second processor;
• applying one or more security algorithms to the retrieved secure packets by the second processor to generate corresponding security-processed packets at the second processor;
• while the first processor returns a security-processed packet from the second processor, further processing a previously security-processed packet at the first processor to generate a secure data output;
• executing code on the first processor, and enabling the second processor to perform concurrent operations, including:
• (i) retrieving a secure packet from the system memory via the system data-bus, the retrieving involving a delay while a read completes during which the first processor is unoccupied in the retrieving and begins another operation;
• (ii) security processing of a previously retrieved packet by the second processor, the security processing involving a delay while the first processor awaits return of a security-processed packet from the second processor and during which the first processor begins another operation;
• (iii) processing a previously security-processed packet by the first processor to generate a corresponding secure data output;
• and
• (iv) writing previously generated output data to the system memory via the system data-bus, the writing involving a delay while the write completes in during which the first processor is unoccupied in the writing and begins another operation.

A set-top box for processing packet streams, the box comprising:

• an input configured to receive packets of data;
• a system data-bus configured to transfer the packets of data;
• a system memory connected to the system data-bus and configured to store packets;
• a first processor connected to the system data-bus and configured to retrieve secure packets from the system memory via the system data bus;
• and
• a second processor connected to the system data-bus,
• the first processor is programmed to control security processing of the retrieved secure packets by the second processor,
• the second processor is configured to perform security processing by applying one or more security algorithms to the retrieved secure packets to generate corresponding security-processed packets,
• the security processing of each retrieved secure packet involves a security processing delay, and
• the first processor is further configured to process the security-processed packet to generate corresponding secure data output, and enable the second processor to perform concurrent operations, including:
• (i) retrieving a secure packet from the system memory via the system data-bus, the retrieving involving a delay while a read completes during which the first processor is unoccupied in the retrieving and begins another operation;
• (ii) security processing of a previously retrieved packet by the second processor, the security processing involving a delay while the first processor awaits return of a security-processed packet from the second processor and during which the first processor begins another operation;
• (iii) processing a previously security-processed packet by the first processor to generate a data output;
• and
• (iv) writing previously generated output data to the system memory via the system data-bus, the writing involving a delay while the write completes during which the first processor is unoccupied in the writing and begins another operation.

A television for processing packet streams, the television comprising:

• a display configured to display video corresponding to packets of data;
• a system data-bus configured to transfer the packets of data;
• a system memory connected to the data-bus and configured to store packets;
• a first processor connected to the system data-bus and configured to retrieve secure packets from the system memory via the system data bus;
• and
• a second processor connected to the data-bus,
• the first processor is programmed to control security processing of the retrieved secure packets by the second processor,
• the second processor is configured to perform security processing by applying one or more security algorithms to retrieved secure packets to generate corresponding security-processed packets,
• the security processing of each retrieved secure packet involves a security processing delay, and
• the first processor is further configured to process the security-processed packet to generate a secure data output, and enable the second processor to perform concurrent operations, including:
• (i) retrieving a secure packet from the system memory via the system data-bus, the retrieving involving a delay while a read completes during which the first processor is unoccupied in the retrieving and begins another operation;
• (ii) security processing of a previously retrieved packet by the second processor, the security processing involving a delay while the first processor awaits return of a security-processed packet from the second processor and during which the first processor begins another operation;
• (iii) processing a previously security-processed packet by the first processor to generate a data output;
• and
• (iv) writing previously generated output data to the system memory via the system data-bus, the writing involving a delay while the write completes during which the first processor is unoccupied in the writing and begins another operation.

A television tuner and demodulator device for processing packet streams, the device comprising:

• a receiver configured to receive signals corresponding to packets of data;
• a system data-bus configured to transfer the packets of data;
• a system memory connected to the system data-bus and configured to store packets;
• a first processor connected to the system data-bus and configured to retrieve secure packets from the system memory via the system data bus;
• and
• a second processor connected to the data-bus,
• the first processor is programmed to control security processing of the retrieved secure packets by the second processor,
• the second processor is configured to perform security processing by applying one or more security algorithms to retrieved secure packets to generate corresponding security-processed packets,
• the security processing of each retrieved secure packet involves a security processing delay, and
• the first processor is further configured to process the security-processed packet to generate a secure data output, and enable the second processor to perform concurrent operations, including:
• (i) retrieving a secure packet from the system memory via the system data-bus, the retrieving involving a delay while a read completes during which the first processor is unoccupied in the retrieving and begins another operation;
• (ii) security processing of a previously retrieved packet by the second processor, the security processing involving a delay while the first processor awaits return of a security-processed packet from the second processor and during which the first processor begins another operation;
• (iii) processing a previously security-processed packet by the first processor to generate a data output;
• and
• (iv) writing previously generated output data to the system memory via the system data-bus, the writing involving a delay while the write completes during which the first processor is unoccupied in the writing and begins another operation.