Flip-flop

Abstract

According to one aspect of the present disclosure, there is provided a flip flop circuit, comprising a first input circuit configured to receive a clock input signal and input data and comprising a first node. The flip-clop circuit further comprises a second input circuit configured to receive the input data and an inverse of the clock signal and comprising a second node. The first and second input circuits are configured such that the first node and the second node are pre-charged to respective complementary states when the clock signal is at a first level and, dependent on a value of the input data, one of said first and second nodes changes state to a state complementary to its pre-charged state when the clock signal transitions from the first level to a second level.

Dependencies are inferred from the claim text.