Dual side package on package
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorsDominique Marais, Jacques Chavade, Rémi Brechignac, Eric Saugier, Romain Coffy, Luc Petit
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AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorsDominique Marais, Jacques Chavade, Rémi Brechignac, Eric Saugier, Romain Coffy, Luc Petit
Estimating the term…
An electronic package includes a substrate wafer with an interconnect network. A first chip is fixed to a front of the substrate, connected to the interconnect network and encapsulated by a body. A second chip is placed on a back side of the substrate wafer and connected to the interconnect network by back-side connection elements interposed between the back side of the substrate and a front side of the second chip. Front-side connection elements are placed on the front side of the substrate and connected to the interconnect network. The connection elements extend beyond the frontal face of the body. The package may be mounted on a board with an interposed thermally conductive material.
An electronic device, comprising:
An electronic device, comprising:
An electronic device, comprising:
Dependencies are inferred from the claim text.